ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case

[karo-tx-uboot.git] / board / exbitgen / exbitgen.c

diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c
index f2cd8caec0652b172627d4c010d714f7bce31ed3..50d9748c71a9a80374105663081463625832e96d 100644 (file)
--- a/board/exbitgen/exbitgen.c
+++ b/board/exbitgen/exbitgen.c
@@ -1,10 +1,12 @@
+#include <common.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
-#include <common.h>
 #include "exbitgen.h"
 
+void sdram_init(void);
+
 /* ************************************************************************ */
-int board_pre_init (void)
+int board_early_init_f (void)
 /* ------------------------------------------------------------------------ --
  * Purpose     :
  * Remarks     :
@@ -35,13 +37,13 @@ int board_pre_init (void)
    |
    +-------------------------------------------------------------------------*/
 
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
-       mtdcr (uicer, 0x00000000);      /* disable all ints */
-       mtdcr (uiccr, 0x00000020);      /* set all but FPGA SMI to be non-critical */
-       mtdcr (uicpr, 0xFFFFFF90);      /* set int polarities */
-       mtdcr (uictr, 0x10000000);      /* set int trigger levels */
-       mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all ints */
+       mtdcr (UIC0CR, 0x00000020);     /* set all but FPGA SMI to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFF90);     /* set int polarities */
+       mtdcr (UIC0TR, 0x10000000);     /* set int trigger levels */
+       mtdcr (UIC0VCR, 0x00000001);    /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
 
        /* Perform reset of PHY connected to PPC via register in CPLD */
        out8 (PHY_CTRL_ADDR, 0x2e);     /* activate nRESET,FDX,F100,ANEN, enable output */
@@ -69,7 +71,7 @@ int checkboard (void)
 }
 
 /* ************************************************************************ */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 /* ------------------------------------------------------------------------ --
  * Purpose     : Determines size of mounted DRAM.
  * Remarks     : Size is determined by reading SDRAM configuration registers as
@@ -83,31 +85,38 @@ long int initdram (int board_type)
        ulong bank_size;
        ulong tmp;
 
+       /*
+        * ToDo: Move the asm init routine sdram_init() to this C file,
+        * or even better use some common ppc4xx code available
+        * in cpu/ppc4xx
+        */
+       sdram_init();
+
        tot_size = 0;
 
-       mtdcr (memcfga, mem_mb0cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb1cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B1CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb2cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B2CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb3cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B3CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;