ppc4xx: Convert PPC4xx UIC defines from lower case to upper case

[karo-tx-uboot.git] / board / exbitgen / exbitgen.c

diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c
index 0f8412776b6739b4b301a9a3d0676368f1d2ba46..ce6469d29e1c596889a658836406598e356bebba 100644 (file)
--- a/board/exbitgen/exbitgen.c
+++ b/board/exbitgen/exbitgen.c
@@ -37,13 +37,13 @@ int board_early_init_f (void)
    |
    +-------------------------------------------------------------------------*/
 
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
-       mtdcr (uicer, 0x00000000);      /* disable all ints */
-       mtdcr (uiccr, 0x00000020);      /* set all but FPGA SMI to be non-critical */
-       mtdcr (uicpr, 0xFFFFFF90);      /* set int polarities */
-       mtdcr (uictr, 0x10000000);      /* set int trigger levels */
-       mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all ints */
+       mtdcr (UIC0CR, 0x00000020);     /* set all but FPGA SMI to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFF90);     /* set int polarities */
+       mtdcr (UIC0TR, 0x10000000);     /* set int trigger levels */
+       mtdcr (UIC0VCR, 0x00000001);    /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);     /* clear all ints */
 
        /* Perform reset of PHY connected to PPC via register in CPLD */
        out8 (PHY_CTRL_ADDR, 0x2e);     /* activate nRESET,FDX,F100,ANEN, enable output */