*
* Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <mpc8xx.h>
+#include <pcmcia.h>
#define _NOT_USED_ 0xFFFFFFFF
/* ========================================================================= */
-#ifndef CONFIG_DUET_ADS /* No old DRAM on Duet */
+#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */
#if defined(CONFIG_DRAM_50MHZ)
/* 50MHz tables */
#error dram not correctly defined - use CONFIG_DRAM_25MHZ or CONFIG_DRAM_50MHZ
#endif
-/* ------------------------------------------------------------------------- */
-static long int dram_size (long int *base, long int maxsize)
-{
- volatile long int *addr=base;
- ulong cnt, val;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- *addr = save[i];
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- return (cnt * sizeof (long));
- }
- }
- return (maxsize);
-}
-
/* ------------------------------------------------------------------------- */
static int _draminit (uint base, uint noMbytes, uint edo, uint delay)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
/* init upm */
/* if no dimm is inserted, noMbytes is still detected as 8m, so
* sanity check top and bottom of memory */
- /* check bytes / 2 because dram_size tests at base+bytes, which
+ /* check bytes / 2 because get_ram_size tests at base+bytes, which
* is not mapped */
if (noMbytes == 8)
- if (dram_size ((long *) base, noMbytes << 19) != noMbytes << 19) {
+ if (get_ram_size ((long *) base, noMbytes << 19) != noMbytes << 19) {
*((uint *) BCSR1) |= BCSR1_DRAM_EN; /* disable dram */
return -1;
}
static void _dramdisable(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_br2 = 0x00000000;
/* maybe we should turn off upma here or something */
}
-#endif /* !CONFIG_DUET_ADS */
+#endif /* !CONFIG_MPC885ADS */
/* ========================================================================= */
static int _initsdram(uint base, uint noMbytes)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
/* Now run the precharge/nop/mrs commands.
*/
- memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50Mhz) */
- /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100Mhz) */
+ memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50MHz) */
+ /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100MHz) */
udelay(200);
/* Run 8 refresh cycles */
- memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 Mhz)*/
+ memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 MHz)*/
/* run upmb cs4 loop 1 addr 0x11 precharge+MRS (100MHz) */
udelay(200);
- memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 Mhz) or TLF 8 (50MHz) */
- memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 Mhz) */
+ memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 MHz) or TLF 8 (50MHz) */
+ memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 MHz) */
/* run upmb cs4 loop 1 addr 0x11 precharge+MRS ??? (100MHz) */
udelay(200);
static int _initsdram(uint base, uint noMbytes)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
static void _sdramdisable(void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_br4 = 0x00000000;
static int initsdram(uint base, uint *noMbytes)
{
- uint m = CFG_SDRAM_SIZE>>20;
+ uint m = CONFIG_SYS_SDRAM_SIZE>>20;
/* _initsdram needs access to sdram */
*((uint *)BCSR1) |= BCSR1_SDRAM_EN; /* enable sdram */
/* ========================================================================= */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
uint sdramsz = 0; /* size of sdram in Mbytes */
- uint base = 0; /* base of dram in bytes */
uint m = 0; /* size of dram in Mbytes */
-#ifndef CONFIG_DUET_ADS
+#ifndef CONFIG_MPC885ADS
+ uint base = 0; /* base of dram in bytes */
uint k, s;
#endif
#ifdef CONFIG_FADS
if (!initsdram (0x00000000, &sdramsz)) {
+#ifndef CONFIG_MPC885ADS
base = sdramsz << 20;
+#endif
printf ("(%u MB SDRAM) ", sdramsz);
}
#endif
-#ifndef CONFIG_DUET_ADS /* No old DRAM on Duet */
+#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */
k = (*((uint *) BCSR2) >> 23) & 0x0f;
switch (k & 0x3) {
_dramdisable ();
m = 0;
}
-#endif /* !CONFIG_DUET_ADS */
+#endif /* !CONFIG_MPC885ADS */
m += sdramsz; /* add sdram size to total */
return (m << 20);
* Check Board Identity:
*/
-#if defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD)
+#if defined(CONFIG_FADS) && defined(CONFIG_SYS_DAUGHTERBOARD)
static void checkdboard(void)
{
/* get db type from BCSR 3 */
default : printf("0x%x", k);
}
}
-#endif /* defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD) */
+#endif /* defined(CONFIG_FADS) && defined(CONFIG_SYS_DAUGHTERBOARD) */
int checkboard (void)
{
- /* get revision from BCSR 3 */
+#if defined(CONFIG_MPC86xADS)
+ puts ("Board: MPC86xADS\n");
+#elif defined(CONFIG_MPC885ADS)
+ puts ("Board: MPC885ADS\n");
+#else /* Only old ADS/FADS have got revision ID in BCSR3 */
uint r = (((*((uint *) BCSR3) >> 23) & 1) << 3)
| (((*((uint *) BCSR3) >> 19) & 1) << 2)
| (((*((uint *) BCSR3) >> 16) & 3));
puts ("Board: ");
-
-#if defined(CONFIG_MPC86xADS)
- puts ("MPC86xADS");
-#elif defined(CONFIG_DUET_ADS)
- puts ("DUET ADS");
- r = 0; /* I've got NR (No Revision) board */
-#elif defined(CONFIG_FADS)
+#if defined(CONFIG_FADS)
puts ("FADS");
checkdboard ();
#else
puts ("ADS");
#endif
+
puts (" rev ");
switch (r) {
puts ("A - warning, read errata \n");
break;
case 0x03:
- puts ("B \n");
+ puts ("B\n");
break;
-#elif defined(CONFIG_DUET_ADS)
- case 0x00:
- puts ("NR\n");
- break;
-#else /* FADS and newer */
+#else /* FADS */
case 0x00:
puts ("ENG\n");
break;
printf ("unknown (0x%x)\n", r);
return -1;
}
+#endif /* CONFIG_MPC86xADS */
return 0;
}
/* ========================================================================= */
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
+#ifdef CONFIG_SYS_PCMCIA_MEM_ADDR
+volatile unsigned char *pcmcia_mem = (unsigned char*)CONFIG_SYS_PCMCIA_MEM_ADDR;
#endif
int pcmcia_init(void)
{
volatile pcmconf8xx_t *pcmp;
- uint v, slota, slotb;
+ uint v, slota = 0, slotb = 0;
/*
** Enable the PCMCIA for a Flash card.
*/
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
#if 0
- pcmp->pcmc_pbr0 = CFG_PCMCIA_MEM_ADDR;
+ pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_MEM_ADDR;
pcmp->pcmc_por0 = 0xc00ff05d;
#endif
/* Set all slots to zero by default. */
pcmp->pcmc_pgcra = 0;
pcmp->pcmc_pgcrb = 0;
-#ifdef PCMCIA_SLOT_A
+#ifdef CONFIG_PCMCIA_SLOT_A
pcmp->pcmc_pgcra = 0x40;
#endif
-#ifdef PCMCIA_SLOT_B
+#ifdef CONFIG_PCMCIA_SLOT_B
pcmp->pcmc_pgcrb = 0x40;
#endif
/* Check if any PCMCIA card is plugged in. */
+#ifdef CONFIG_PCMCIA_SLOT_A
slota = (pcmp->pcmc_pipr & 0x18000000) == 0 ;
+#endif
+#ifdef CONFIG_PCMCIA_SLOT_B
slotb = (pcmp->pcmc_pipr & 0x00001800) == 0 ;
+#endif
if (!(slota || slotb)) {
printf("No card present\n");
-#ifdef PCMCIA_SLOT_A
pcmp->pcmc_pgcra = 0;
-#endif
-#ifdef PCMCIA_SLOT_B
pcmp->pcmc_pgcrb = 0;
-#endif
return -1;
}
else
switch ((pcmp->pcmc_pipr >> 14) & 3)
#endif
{
- case 0x00 :
+ case 0x03 :
printf("5V");
v = 5;
break;
v = 5;
#endif
break;
- case 0x03 :
+ case 0x00 :
printf("5V, 3V and x.xV");
#ifdef CONFIG_FADS
v = 3; /* User lower voltage if supported! */
udelay(20);
-#ifdef PCMCIA_SLOT_A
+#ifdef CONFIG_PCMCIA_SLOT_A
pcmp->pcmc_pgcra = 0;
-#elif PCMCIA_SLOT_B
+#endif
+#ifdef CONFIG_PCMCIA_SLOT_B
pcmp->pcmc_pgcrb = 0;
#endif
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
/* ========================================================================= */
-#ifdef CFG_PC_IDE_RESET
+#ifdef CONFIG_SYS_PC_IDE_RESET
void ide_set_reset(int on)
{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
/*
* Configure PC for IDE Reset Pin
*/
if (on) { /* assert RESET */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET);
+ immr->im_ioport.iop_pcdat &= ~(CONFIG_SYS_PC_IDE_RESET);
} else { /* release RESET */
- immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET;
+ immr->im_ioport.iop_pcdat |= CONFIG_SYS_PC_IDE_RESET;
}
/* program port pin as GPIO output */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET;
+ immr->im_ioport.iop_pcpar &= ~(CONFIG_SYS_PC_IDE_RESET);
+ immr->im_ioport.iop_pcso &= ~(CONFIG_SYS_PC_IDE_RESET);
+ immr->im_ioport.iop_pcdir |= CONFIG_SYS_PC_IDE_RESET;
}
-#endif /* CFG_PC_IDE_RESET */
+#endif /* CONFIG_SYS_PC_IDE_RESET */
projects / karo-tx-uboot.git / blobdiff