Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'

[karo-tx-uboot.git] / board / flagadm / flagadm.c

diff --git a/board/flagadm/flagadm.c b/board/flagadm/flagadm.c
index bfd15251e806a542fb63bb3ea55f004c3c6af379..343cb77409a8e1a58e891051ea7a2e17334b7947 100644 (file)
--- a/board/flagadm/flagadm.c
+++ b/board/flagadm/flagadm.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2001
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -96,20 +80,20 @@ int checkboard (void)
        return 0;
 }
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
-       volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+       volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        long int size_b0;
 
-       memctl->memc_or2 = CFG_OR2;
-       memctl->memc_br2 = CFG_BR2;
+       memctl->memc_or2 = CONFIG_SYS_OR2;
+       memctl->memc_br2 = CONFIG_SYS_BR2;
 
        udelay(100);
        upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
 
        memctl->memc_mptpr = MPTPR_PTP_DIV16;
-       memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_1X;
+       memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_1X;
 
        /*Do the initialization of the SDRAM*/
        /*Start with the precharge cycle*/
@@ -117,7 +101,7 @@ long int initdram (int board_type)
                                MCR_MLCF(1) | MCR_MAD(0x5));
 
        /*Then we need two refresh cycles*/
-       memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_2X;
+       memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_2X;
        memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
                                MCR_MLCF(2) | MCR_MAD(0x30));
 
@@ -127,8 +111,8 @@ long int initdram (int board_type)
                                MCR_MLCF(1) | MCR_MAD(0x1C));
 
        /* That should do it, just enable the periodic refresh in burst of 4*/
-       memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_4X;
-       memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_B4DIS);
+       memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_4X;
+       memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_A4DIS);
 
        size_b0 = 16*1024*1024;
 
@@ -141,10 +125,10 @@ long int initdram (int board_type)
 
        upmconfig(UPMB, (uint *)dsp_disp_table, sizeof(dsp_disp_table)/sizeof(uint));
 
-       memctl->memc_mbmr = MAMR_GPL_B4DIS;
+       memctl->memc_mbmr = MBMR_GPL_B4DIS;
 
-       memctl->memc_or4 = CFG_OR4;
-       memctl->memc_br4 = CFG_BR4;
+       memctl->memc_or4 = CONFIG_SYS_OR4;
+       memctl->memc_br4 = CONFIG_SYS_BR4;
 
        return (size_b0);
 }