Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / board / freescale / b4860qds / tlb.c

diff --git a/board/freescale/b4860qds/tlb.c b/board/freescale/b4860qds/tlb.c
index 373cb7848cbafcbe5fbc0a247fb8662e2d80e3e2..f71aca4092000d2d6dc2463f6ab5961bfef9e7fe 100644 (file)
--- a/board/freescale/b4860qds/tlb.c
+++ b/board/freescale/b4860qds/tlb.c
@@ -1,23 +1,7 @@
 /*
  * Copyright 2011-2012 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -52,6 +36,15 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 0, BOOKE_PAGESZ_1M, 1),
+#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
+       /*
+        * SRIO_PCIE_BOOT-SLAVE. When slave boot, the address of the
+        * space is at 0xfff00000, it covered the 0xfffff000.
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR,
+                     CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+                     0, 0, BOOKE_PAGESZ_1M, 1),
 #else
        SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
@@ -106,13 +99,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
        SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-                     0, 10, BOOKE_PAGESZ_4M, 1),
+                     0, 10, BOOKE_PAGESZ_32M, 1),
 #endif
 #ifdef CONFIG_SYS_NAND_BASE
        /*
         * *I*G - NAND
-        * entry 14 and 15 has been used hard coded, they will be disabled
-        * in cpu_init_f, so we use entry 16 for nand.
         */
        SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
@@ -122,6 +113,33 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 12, BOOKE_PAGESZ_4K, 1),
 
+       /*
+        * *I*G - SRIO
+        * entry 14 and 15 has been used hard coded, they will be disabled
+        * in cpu_init_f, so we use entry 16 for SRIO2.
+        */
+#ifdef CONFIG_SYS_SRIO1_MEM_PHYS
+       /* *I*G* - SRIO1 */
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT, CONFIG_SYS_SRIO1_MEM_PHYS,
+               MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 13, BOOKE_PAGESZ_256M, 1),
+#endif
+#ifdef CONFIG_SYS_SRIO2_MEM_PHYS
+       /* *I*G* - SRIO2 */
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO2_MEM_VIRT, CONFIG_SYS_SRIO2_MEM_PHYS,
+               MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 16, BOOKE_PAGESZ_256M, 1),
+#endif
+#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
+       /*
+        * SRIO_PCIE_BOOT-SLAVE. 1M space from 0xffe00000 for
+        * fetching ucode and ENV from master
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR,
+                     CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+                     0, 17, BOOKE_PAGESZ_1M, 1),
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);