]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/freescale/common/ics307_clk.c
Merge git://git.denx.de/u-boot-arm
[karo-tx-uboot.git] / board / freescale / common / ics307_clk.c
index 6acbc361a338b43f5503067c0cdc8f58b88e74fd..6789efb9c391de50939d1c258aa236b80081f287 100644 (file)
@@ -1,23 +1,7 @@
 /*
- * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 
 #include "ics307_clk.h"
 
-#ifdef CONFIG_FSL_NGPIXIS
+#if defined(CONFIG_FSL_NGPIXIS)
 #include "ngpixis.h"
+#define fpga_reg pixis
+#elif defined(CONFIG_FSL_QIXIS)
+#include "qixis.h"
+#define fpga_reg ((struct qixis *)QIXIS_BASE)
 #else
 #include "pixis.h"
+#define fpga_reg pixis
 #endif
 
 /* define for SYS CLK or CLK1Frequency */
@@ -143,15 +132,15 @@ static unsigned long ics307_clk_freq(u8 cw0, u8 cw1, u8 cw2)
 unsigned long get_board_sys_clk(void)
 {
        return ics307_clk_freq(
-                       in_8(&pixis->sclk[0]),
-                       in_8(&pixis->sclk[1]),
-                       in_8(&pixis->sclk[2]));
+                       in_8(&fpga_reg->sclk[0]),
+                       in_8(&fpga_reg->sclk[1]),
+                       in_8(&fpga_reg->sclk[2]));
 }
 
 unsigned long get_board_ddr_clk(void)
 {
        return ics307_clk_freq(
-                       in_8(&pixis->dclk[0]),
-                       in_8(&pixis->dclk[1]),
-                       in_8(&pixis->dclk[2]));
+                       in_8(&fpga_reg->dclk[0]),
+                       in_8(&fpga_reg->dclk[1]),
+                       in_8(&fpga_reg->dclk[2]));
 }