/*
* Copyright 2009-2011 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/cache.h>
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#define EMI1_MASK 0xc0000000
#define EMI2_MASK 0x30000000
+#define PHY_BASE_ADDR 0x00
+#define PHY_BASE_ADDR_SLOT5 0x10
+
static int mdio_mux[NUM_FM_PORTS];
static char *mdio_names[16] = {
NULL, NULL, NULL,
};
+/*
+ * Mapping of all 18 SERDES lanes to board slots. A value of '0' here means
+ * that the mapping must be determined dynamically, or that the lane maps to
+ * something other than a board slot.
+ */
+static u8 lane_to_slot[] = {
+ 1, 1, 2, 2, 3, 3, 3, 3, 6, 6, 4, 4, 4, 4, 5, 5, 5, 5
+};
+
static char *p4080ds_mdio_name_for_muxval(u32 muxval)
{
return mdio_names[(muxval & EMI_MASK) >> 28];
return bus;
}
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
+#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) && defined(CONFIG_PHY_TERANETICS)
int board_phy_config(struct phy_device *phydev)
{
- /*
- * If this is the 10G PHY, and we switched it to fiber,
- * we need to reset the serdes link for SERDES9
- */
- if ((phydev->port == PORT_FIBRE) && (phydev->drv->uid == 0x00a19410)) {
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+ if (phydev->drv->uid == PHY_UID_TN2020) {
+ unsigned long timeout = 1 * 1000; /* 1 seconds */
enum srds_prtcl device;
+ /*
+ * Wait for the XAUI to come out of reset. This is when it
+ * starts transmitting alignment signals.
+ */
+ while (--timeout) {
+ int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_CTRL1);
+ if (reg < 0) {
+ printf("TN2020: Error reading from PHY at "
+ "address %u\n", phydev->addr);
+ break;
+ }
+ /*
+ * Note that we've never actually seen
+ * MDIO_CTRL1_RESET set to 1.
+ */
+ if ((reg & MDIO_CTRL1_RESET) == 0)
+ break;
+ udelay(1000);
+ }
+
+ if (!timeout) {
+ printf("TN2020: Timeout waiting for PHY at address %u "
+ " to reset.\n", phydev->addr);
+ }
+
switch (phydev->addr) {
- case 4:
+ case CONFIG_SYS_FM1_10GEC1_PHY_ADDR:
device = XAUI_FM1;
break;
- case 0:
+ case CONFIG_SYS_FM2_10GEC1_PHY_ADDR:
device = XAUI_FM2;
break;
default:
return mdio_register(bus);
}
-/*
- * Sets the specified node's status to the value contained in "status"
- * If the first character of the specified path is "/" then we use
- * alias as a path. Otherwise, we look for an alias of that name
- */
-static void fdt_set_node_status(void *fdt, const char *alias,
- const char *status)
-{
- const char *path = fdt_get_alias(fdt, alias);
-
- if (!path)
- path = alias;
-
- do_fixup_by_path(fdt, path, "status", status, strlen(status) + 1, 1);
-}
-
void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
enum fm_port port, int offset)
{
*/
/* We've got six MDIO nodes that may or may not need to exist */
- fdt_set_node_status(fdt, "emi1_slot3", "disabled");
- fdt_set_node_status(fdt, "emi1_slot4", "disabled");
- fdt_set_node_status(fdt, "emi1_slot5", "disabled");
- fdt_set_node_status(fdt, "emi2_slot4", "disabled");
- fdt_set_node_status(fdt, "emi2_slot5", "disabled");
+ fdt_status_disabled_by_alias(fdt, "emi1_slot3");
+ fdt_status_disabled_by_alias(fdt, "emi1_slot4");
+ fdt_status_disabled_by_alias(fdt, "emi1_slot5");
+ fdt_status_disabled_by_alias(fdt, "emi2_slot4");
+ fdt_status_disabled_by_alias(fdt, "emi2_slot5");
for (i = 0; i < NUM_FM_PORTS; i++) {
switch (mdio_mux[i]) {
case EMI1_SLOT3:
- fdt_set_node_status(fdt, "emi1_slot3", "okay");
+ fdt_status_okay_by_alias(fdt, "emi1_slot3");
break;
case EMI1_SLOT4:
- fdt_set_node_status(fdt, "emi1_slot4", "okay");
+ fdt_status_okay_by_alias(fdt, "emi1_slot4");
break;
case EMI1_SLOT5:
- fdt_set_node_status(fdt, "emi1_slot5", "okay");
+ fdt_status_okay_by_alias(fdt, "emi1_slot5");
break;
case EMI2_SLOT4:
- fdt_set_node_status(fdt, "emi2_slot4", "okay");
+ fdt_status_okay_by_alias(fdt, "emi2_slot4");
break;
case EMI2_SLOT5:
- fdt_set_node_status(fdt, "emi2_slot5", "okay");
+ fdt_status_okay_by_alias(fdt, "emi2_slot5");
break;
}
}
}
-enum board_slots {
- SLOT1 = 1,
- SLOT2,
- SLOT3,
- SLOT4,
- SLOT5,
- SLOT6,
-};
-
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_FMAN_ENET
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
- struct dtsec *tsec = (void *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
int i;
struct fsl_pq_mdio_info dtsec_mdio_info;
struct tgec_mdio_info tgec_mdio_info;
-
- u8 lane_to_slot[] = {
- SLOT1, /* 0 - Bank 1:A */
- SLOT1, /* 1 - Bank 1:B */
- SLOT2, /* 2 - Bank 1:C */
- SLOT2, /* 3 - Bank 1:D */
- SLOT3, /* 4 - Bank 1:E */
- SLOT3, /* 5 - Bank 1:F */
- SLOT3, /* 6 - Bank 1:G */
- SLOT3, /* 7 - Bank 1:H */
- SLOT6, /* 8 - Bank 1:I */
- SLOT6, /* 9 - Bank 1:J */
- SLOT4, /* 10 - Bank 2:A */
- SLOT4, /* 11 - Bank 2:B */
- SLOT4, /* 12 - Bank 2:C */
- SLOT4, /* 13 - Bank 2:D */
- SLOT5, /* 14 - Bank 3:A */
- SLOT5, /* 15 - Bank 3:B */
- SLOT5, /* 16 - Bank 3:C */
- SLOT5, /* 17 - Bank 3:D */
- };
-
- /*
- * Set TBIPA on FM1@DTSEC1. This is needed for configurations
- * where FM1@DTSEC1 isn't used directly, since it provides
- * MDIO for other ports.
- */
- out_be32(&tsec->tbipa, CONFIG_SYS_TBIPA_VALUE);
+ struct mii_dev *bus;
/* Initialize the mdio_mux array so we can recognize empty elements */
for (i = 0; i < NUM_FM_PORTS; i++)
break;
slot = lane_to_slot[lane];
switch (slot) {
- case SLOT3:
+ case 3:
mdio_mux[i] = EMI1_SLOT3;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT4:
+ case 4:
mdio_mux[i] = EMI1_SLOT4;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT5:
+ case 5:
mdio_mux[i] = EMI1_SLOT5;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
}
}
+ bus = mii_dev_for_muxval(EMI1_SLOT5);
+ set_sgmii_phy(bus, FM1_DTSEC1,
+ CONFIG_SYS_NUM_FM1_DTSEC, PHY_BASE_ADDR_SLOT5);
for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
int idx = i - FM1_10GEC1, lane, slot;
break;
slot = lane_to_slot[lane];
switch (slot) {
- case SLOT4:
+ case 4:
mdio_mux[i] = EMI2_SLOT4;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT5:
+ case 5:
mdio_mux[i] = EMI2_SLOT5;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
slot = lane_to_slot[lane];
switch (slot) {
- case SLOT3:
+ case 3:
mdio_mux[i] = EMI1_SLOT3;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT4:
+ case 4:
mdio_mux[i] = EMI1_SLOT4;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT5:
+ case 5:
mdio_mux[i] = EMI1_SLOT5;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
}
}
+ bus = mii_dev_for_muxval(EMI1_SLOT3);
+ set_sgmii_phy(bus, FM2_DTSEC1, CONFIG_SYS_NUM_FM2_DTSEC, PHY_BASE_ADDR);
+ bus = mii_dev_for_muxval(EMI1_SLOT4);
+ set_sgmii_phy(bus, FM2_DTSEC1, CONFIG_SYS_NUM_FM2_DTSEC, PHY_BASE_ADDR);
+
for (i = FM2_10GEC1; i < FM2_10GEC1 + CONFIG_SYS_NUM_FM2_10GEC; i++) {
int idx = i - FM2_10GEC1, lane, slot;
switch (fm_info_get_enet_if(i)) {
break;
slot = lane_to_slot[lane];
switch (slot) {
- case SLOT4:
+ case 4:
mdio_mux[i] = EMI2_SLOT4;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));
break;
- case SLOT5:
+ case 5:
mdio_mux[i] = EMI2_SLOT5;
fm_info_set_mdio(i,
mii_dev_for_muxval(mdio_mux[i]));