ColdFire: Clean up checkpatch warnings for MCF52x2

[karo-tx-uboot.git] / board / freescale / m5253demo / m5253demo.c

diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index 8ffb2cc0447d9df58cf48523619f87af7687ef59..052993da6607762a86a9d382e76abd5a5d4a3bfc 100644 (file)
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  * Hayden Fraser (Hayden.Fraser@freescale.com)
  *
  * See file CREDITS for list of people who contributed to this
@@ -109,7 +109,7 @@ int ide_preinit(void)
 
 void ide_set_reset(int idereset)
 {
-       volatile atac_t *ata = (atac_t *) CONFIG_SYS_ATA_BASE_ADDR;
+       atac_t *ata = (atac_t *) CONFIG_SYS_ATA_BASE_ADDR;
        long period;
        /*  t1,  t2,  t3,  t4,  t5,  t6,  t9, tRD,  tA */
        int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35},       /* PIO 0 */
@@ -120,7 +120,8 @@ void ide_set_reset(int idereset)
        };
 
        if (idereset) {
-               ata->cr = 0;    /* control reset */
+               /* control reset */
+               out_8(&ata->cr, 0);
                udelay(100);
        } else {
                mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
@@ -129,17 +130,19 @@ void ide_set_reset(int idereset)
                period = 1000000000 / (CONFIG_SYS_CLK / 2);     /* period in ns */
 
                /*ata->ton = CALC_TIMING (180); */
-               ata->t1 = CALC_TIMING(piotms[2][0]);
-               ata->t2w = CALC_TIMING(piotms[2][1]);
-               ata->t2r = CALC_TIMING(piotms[2][1]);
-               ata->ta = CALC_TIMING(piotms[2][8]);
-               ata->trd = CALC_TIMING(piotms[2][7]);
-               ata->t4 = CALC_TIMING(piotms[2][3]);
-               ata->t9 = CALC_TIMING(piotms[2][6]);
-
-               ata->cr = 0x40; /* IORDY enable */
+               out_8(&ata->t1, CALC_TIMING(piotms[2][0]));
+               out_8(&ata->t2w, CALC_TIMING(piotms[2][1]));
+               out_8(&ata->t2r, CALC_TIMING(piotms[2][1]));
+               out_8(&ata->ta, CALC_TIMING(piotms[2][8]));
+               out_8(&ata->trd, CALC_TIMING(piotms[2][7]));
+               out_8(&ata->t4, CALC_TIMING(piotms[2][3]));
+               out_8(&ata->t9, CALC_TIMING(piotms[2][6]));
+
+               /* IORDY enable */
+               out_8(&ata->cr, 0x40);
                udelay(2000);
-               ata->cr |= 0x01;        /* IORDY enable */
+               /* IORDY enable */
+               setbits_8(&ata->cr, 0x01);
        }
 }
 #endif                         /* CONFIG_CMD_IDE */