Merge branch 'master' of git://git.denx.de/u-boot-samsung

[karo-tx-uboot.git] / board / freescale / mpc8560ads / mpc8560ads.c

diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index ac7778e25c7c40f87448c5a7947472e480431cfa..1761431e33898e8c548944c404e61f0429359b53 100644 (file)
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -36,6 +36,7 @@
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <asm/fsl_lbc.h>
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
@@ -235,7 +236,7 @@ void reset_phy (void)
 #endif
 #if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
        /* reset PHY */
-       miiphy_reset("FCC1 ETHERNET", 0x0);
+       miiphy_reset("FCC1", 0x0);
 
        /* change PHY address to 0x02 */
        bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
@@ -251,10 +252,10 @@ int checkboard (void)
        puts("Board: ADS\n");
 
 #ifdef CONFIG_PCI
-       printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+       printf("PCI1: 32 bit, %d MHz (compiled)\n",
               CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-       printf("    PCI1: disabled\n");
+       printf("PCI1: disabled\n");
 #endif
 
        /*
@@ -321,7 +322,7 @@ void
 local_bus_init(void)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 
        uint clkdiv;
        uint lbc_hz;
@@ -380,7 +381,7 @@ local_bus_init(void)
 void
 sdram_init(void)
 {
-       volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+       volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
 
        puts("    SDRAM: ");
@@ -389,8 +390,8 @@ sdram_init(void)
        /*
         * Setup SDRAM Base and Option Registers
         */
-       lbc->or2 = CONFIG_SYS_OR2_PRELIM;
-       lbc->br2 = CONFIG_SYS_BR2_PRELIM;
+       set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
+       set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
        lbc->lbcr = CONFIG_SYS_LBC_LBCR;
        asm("msync");