Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

[karo-tx-uboot.git] / board / freescale / mpc8610hpcd / mpc8610hpcd.c

diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index d7dd470c3ffb5605b8166655b8ba67f3e3e2e7f9..2bcd5e6b659f6ee7c4d3ffab0598269bf6c0e678 100644 (file)
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007,2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007,2009-2011 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -76,14 +76,14 @@ int misc_init_r(void)
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n",tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
        tmp_val = 0x10;
        i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
        /* Verify if enabled */
        tmp_val = 0;
        i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
-       debug("DVI Encoder Read: 0x%02lx\n",tmp_val);
+       debug("DVI Encoder Read: 0x%02x\n", tmp_val);
 
        return 0;
 }
@@ -94,11 +94,32 @@ int checkboard(void)
        volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
        u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-       printf ("Board: MPC8610HPCD, System ID: 0x%02x, "
-               "System Version: 0x%02x, FPGA Version: 0x%02x\n",
+       printf ("Board: MPC8610HPCD, Sys ID: 0x%02x, "
+               "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
                in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
                in_8(pixis_base + PIXIS_PVER));
 
+       /*
+        * The MPC8610 HPCD workbook says that LBMAP=11 is the "normal" boot
+        * bank and LBMAP=00 is the alternate bank.  However, the pixis
+        * altbank code can only set bits, not clear them, so we treat 00 as
+        * the normal bank and 11 as the alternate.
+        */
+       switch (in_8(pixis_base + PIXIS_VBOOT) & 0xC0) {
+       case 0:
+               puts("vBank: Standard\n");
+               break;
+       case 0x40:
+               puts("Promjet\n");
+               break;
+       case 0x80:
+               puts("NAND\n");
+               break;
+       case 0xC0:
+               puts("vBank: Alternate\n");
+               break;
+       }
+
        mcm->abcr |= 0x00010000; /* 0 */
        mcm->hpmr3 = 0x80000008; /* 4c */
        mcm->hpmr0 = 0;
@@ -124,7 +145,7 @@ initdram(int board_type)
 
        setup_ddr_bat(dram_size);
 
-       puts(" DDR: ");
+       debug(" DDR: ");
        return dram_size;
 }
 
@@ -206,11 +227,7 @@ static struct pci_config_table pci_fsl86xxads_config_table[] = {
 #endif
 
 
-static struct pci_controller pci1_hose = {
-#ifndef CONFIG_PCI_PNP
-config_table:pci_mpc86xxcts_config_table
-#endif
-};
+static struct pci_controller pci1_hose;
 #endif /* CONFIG_PCI */
 
 void pci_init_board(void)
@@ -218,12 +235,11 @@ void pci_init_board(void)
        volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
        struct fsl_pci_info pci_info;
-       u32 devdisr, pordevsr;
+       u32 devdisr;
        int first_free_busno;
        int pci_agent;
 
        devdisr = in_be32(&gur->devdisr);
-       pordevsr = in_be32(&gur->pordevsr);
 
        first_free_busno = fsl_pcie_init_board(0);
 
@@ -240,6 +256,9 @@ void pci_init_board(void)
                        " (base address %lx)\n",
                        pci_agent ? "Agent" : "Host",
                        pci_info.regs);
+#ifndef CONFIG_PCI_PNP
+               pci1_hose.config_table = pci_mpc86xxcts_config_table;
+#endif
                first_free_busno = fsl_pci_init_port(&pci_info,
                                        &pci1_hose, first_free_busno);
        } else {