Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / board / freescale / mx6qsabreauto / mx6qsabreauto.c

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 91cc0073bdc46046b28196652234b0f16eef7ea3..2a6e3a919225df42b68174e873e6767ef855c87a 100644 (file)
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -26,25 +26,33 @@
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/mxc_i2c.h>
+#include <asm/imx-common/boot_mode.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <miiphy.h>
 #include <netdev.h>
 #include <asm/arch/sys_proto.h>
+#include <i2c.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
+       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |                 \
+       PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |               \
-       PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |                   \
+       PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |                 \
+       PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   |             \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
+#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
+       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+#define I2C_PAD_CTRL   (PAD_CTL_PUS_100K_UP |                  \
+       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |   \
+       PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
 int dram_init(void)
 {
@@ -76,6 +84,45 @@ iomux_v3_cfg_t const enet_pads[] = {
        MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
 };
 
+/* I2C2 PMIC, iPod, Tuner, Codec, Touch, HDMI EDID, MIPI CSI2 card */
+struct i2c_pads_info i2c_pad_info1 = {
+       .scl = {
+               .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
+               .gpio_mode = MX6_PAD_EIM_EB2__GPIO_2_30 | PC,
+               .gp = IMX_GPIO_NR(2, 30)
+       },
+       .sda = {
+               .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
+               .gpio_mode = MX6_PAD_KEY_ROW3__GPIO_4_13 | PC,
+               .gp = IMX_GPIO_NR(4, 13)
+       }
+};
+
+/*
+ * I2C3 MLB, Port Expanders (A, B, C), Video ADC, Light Sensor,
+ * Compass Sensor, Accelerometer, Res Touch
+ */
+struct i2c_pads_info i2c_pad_info2 = {
+       .scl = {
+               .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC,
+               .gpio_mode = MX6_PAD_GPIO_3__GPIO_1_3 | PC,
+               .gp = IMX_GPIO_NR(1, 3)
+       },
+       .sda = {
+               .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
+               .gpio_mode = MX6_PAD_EIM_D18__GPIO_3_18 | PC,
+               .gp = IMX_GPIO_NR(3, 18)
+       }
+};
+
+iomux_v3_cfg_t const i2c3_pads[] = {
+       MX6_PAD_EIM_A24__GPIO_5_4               | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+iomux_v3_cfg_t const port_exp[] = {
+       MX6_PAD_SD2_DAT0__GPIO_1_15             | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
 static void setup_iomux_enet(void)
 {
        imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
@@ -178,7 +225,10 @@ static int mx6sabre_rev(void)
         * i.MX6Q ARD RevB: 0x02
         */
        struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
-       int reg = readl(&ocotp->gp1);
+       struct fuse_bank *bank = &ocotp->bank[4];
+       struct fuse_bank4_regs *fuse =
+                       (struct fuse_bank4_regs *)bank->fuse_regs;
+       int reg = readl(&fuse->gp1);
        int ret;
 
        switch (reg >> 8 & 0x0F) {
@@ -213,6 +263,33 @@ int board_init(void)
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+       /* I2C 2 and 3 setup - I2C 3 hw mux with EIM */
+       setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+       /* I2C 3 Steer */
+       gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
+       imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
+       setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
+
+       gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
+       imx_iomux_v3_setup_multiple_pads(port_exp, ARRAY_SIZE(port_exp));
+
+       return 0;
+}
+
+#ifdef CONFIG_CMD_BMODE
+static const struct boot_mode board_boot_modes[] = {
+       /* 4 bit bus width */
+       {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+       {NULL,   0},
+};
+#endif
+
+int board_late_init(void)
+{
+#ifdef CONFIG_CMD_BMODE
+       add_board_boot_modes(board_boot_modes);
+#endif
+
        return 0;
 }