mx6: Fix get_board_rev() for the mx6 solo case

[karo-tx-uboot.git] / board / freescale / mx6qsabrelite / mx6qsabrelite.c

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index f7b7f077549f529067d174b7d913be8e7f94d37a..9f9cac82c423295c6c1baf3610106fb3f7e52b77 100644 (file)
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -274,6 +274,9 @@ int board_mmc_init(bd_t *bis)
        usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
        usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 
+       usdhc_cfg[0].max_bus_width = 4;
+       usdhc_cfg[1].max_bus_width = 4;
+
        for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
                switch (index) {
                case 0:
@@ -298,11 +301,6 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-u32 get_board_rev(void)
-{
-       return 0x63000 ;
-}
-
 #ifdef CONFIG_MXC_SPI
 iomux_v3_cfg_t const ecspi1_pads[] = {
        /* SS1 */
@@ -455,32 +453,26 @@ struct display_info_t {
 
 static int detect_hdmi(struct display_info_t const *dev)
 {
-       return __raw_readb(HDMI_ARB_BASE_ADDR+HDMI_PHY_STAT0) & HDMI_PHY_HPD;
+       struct hdmi_regs *hdmi  = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+       return readb(&hdmi->phy_stat0) & HDMI_PHY_HPD;
 }
 
 static void enable_hdmi(struct display_info_t const *dev)
 {
+       struct hdmi_regs *hdmi  = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
        u8 reg;
        printf("%s: setup HDMI monitor\n", __func__);
-       reg = __raw_readb(
-                       HDMI_ARB_BASE_ADDR
-                       +HDMI_PHY_CONF0);
+       reg = readb(&hdmi->phy_conf0);
        reg |= HDMI_PHY_CONF0_PDZ_MASK;
-       __raw_writeb(reg,
-                    HDMI_ARB_BASE_ADDR
-                       +HDMI_PHY_CONF0);
+       writeb(reg, &hdmi->phy_conf0);
+
        udelay(3000);
        reg |= HDMI_PHY_CONF0_ENTMDS_MASK;
-       __raw_writeb(reg,
-                    HDMI_ARB_BASE_ADDR
-                       +HDMI_PHY_CONF0);
+       writeb(reg, &hdmi->phy_conf0);
        udelay(3000);
        reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK;
-       __raw_writeb(reg,
-                    HDMI_ARB_BASE_ADDR
-                       +HDMI_PHY_CONF0);
-       __raw_writeb(HDMI_MC_PHYRSTZ_ASSERT,
-                    HDMI_ARB_BASE_ADDR+HDMI_MC_PHYRSTZ);
+       writeb(reg, &hdmi->phy_conf0);
+       writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz);
 }
 
 static int detect_i2c(struct display_info_t const *dev)
@@ -638,6 +630,7 @@ static void setup_display(void)
        struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
        struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
        struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+       struct hdmi_regs *hdmi  = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
 
        int reg;
 
@@ -654,8 +647,7 @@ static void setup_display(void)
        writel(reg, &mxc_ccm->CCGR2);
 
        /* clear HDMI PHY reset */
-       __raw_writeb(HDMI_MC_PHYRSTZ_DEASSERT,
-                    HDMI_ARB_BASE_ADDR+HDMI_MC_PHYRSTZ);
+       writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz);
 
        /* set PFD1_FRAC to 0x13 == 455 MHz (480*18)/0x13 */
        writel(ANATOP_PFD_480_PFD1_FRAC_MASK, &anatop->pfd_480_clr);