/*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
return 0;
}
+const char *board_hwconfig = "foo:bar=baz";
+const char *cpu_hwconfig = "foo:bar=baz";
+
phys_size_t initdram(int board_type)
{
phys_size_t dram_size = 0;
puts("Initializing....");
-#ifdef CONFIG_SPD_EEPROM
+#ifdef CONFIG_DDR_SPD
dram_size = fsl_ddr_sdram();
#else
dram_size = fixed_sdram();
return dram_size;
}
-#if !defined(CONFIG_SPD_EEPROM)
+#if !defined(CONFIG_DDR_SPD)
/*
* Fixed sdram init -- doesn't use serial presence detect.
*/
fdt_fixup_memory(blob, (u64)base, (u64)size);
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
+
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
#endif