powerpc/t104xrdb: Update DDR initialization related settings

[karo-tx-uboot.git] / board / freescale / t104xrdb / ddr.c

diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 9009afa3ad890625346b7046b370ce789b9bc8a6..57d0f9cfd867bbe83375aa998f7748ee7b2d26b9 100644 (file)
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -46,7 +46,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 
        pbsp = udimms[0];
 
-       /* Get clk_adjust, cpo, write_data_delay,2t, according to the board ddr
+       /* Get clk_adjust according to the board ddr
         * freqency and n_banks specified in board_specific_parameters table.
         */
        ddr_freq = get_ddr_freq(0) / 1000000;
@@ -54,14 +54,10 @@ void fsl_ddr_board_options(memctl_options_t *popts,
                if (pbsp->n_ranks == pdimm->n_ranks &&
                    (pdimm->rank_density >> 30) >= pbsp->rank_gb) {
                        if (ddr_freq <= pbsp->datarate_mhz_high) {
-                               popts->cpo_override = pbsp->cpo;
-                               popts->write_data_delay =
-                                       pbsp->write_data_delay;
                                popts->clk_adjust = pbsp->clk_adjust;
                                popts->wrlvl_start = pbsp->wrlvl_start;
                                popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
                                popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
-                               popts->twot_en = pbsp->force_2t;
                                goto found;
                        }
                        pbsp_highest = pbsp;
@@ -74,13 +70,10 @@ void fsl_ddr_board_options(memctl_options_t *popts,
                printf("for data rate %lu MT/s\n", ddr_freq);
                printf("Trying to use the highest speed (%u) parameters\n",
                       pbsp_highest->datarate_mhz_high);
-               popts->cpo_override = pbsp_highest->cpo;
-               popts->write_data_delay = pbsp_highest->write_data_delay;
                popts->clk_adjust = pbsp_highest->clk_adjust;
                popts->wrlvl_start = pbsp_highest->wrlvl_start;
                popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
                popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
-               popts->twot_en = pbsp_highest->force_2t;
        } else {
                panic("DIMM is not supported by this board");
        }
@@ -112,8 +105,8 @@ found:
        popts->zq_en = 1;
 
        /* DHC_EN =1, ODT = 75 Ohm */
-       popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
-       popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+       popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_OFF);
+       popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_OFF);
 }
 
 phys_size_t initdram(int board_type)