/*
* Copyright 2009-2012 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
for (i = 0; i < MAX_SERDES; i++) {
static const char *freq[] = {
"100", "125", "156.25", "161.1328125"};
- unsigned int clock = (sw >> (2 * i)) & 3;
+ unsigned int clock = (sw >> (6 - 2 * i)) & 3;
printf("SERDES%u=%sMHz ", i+1, freq[clock]);
}
return 0;
}
+/*
+ * read_voltage from sensor on I2C bus
+ * We use average of 4 readings, waiting for 532us befor another reading
+ */
+#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */
+#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */
+
+static inline int read_voltage(void)
+{
+ int i, ret, voltage_read = 0;
+ u16 vol_mon;
+
+ for (i = 0; i < NUM_READINGS; i++) {
+ ret = i2c_read(I2C_VOL_MONITOR_ADDR,
+ I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2);
+ if (ret) {
+ printf("VID: failed to read core voltage\n");
+ return ret;
+ }
+ if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
+ printf("VID: Core voltage sensor error\n");
+ return -1;
+ }
+ debug("VID: bus voltage reads 0x%04x\n", vol_mon);
+ /* LSB = 4mv */
+ voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
+ udelay(WAIT_FOR_ADC);
+ }
+ /* calculate the average */
+ voltage_read /= NUM_READINGS;
+
+ return voltage_read;
+}
+
+/*
+ * We need to calculate how long before the voltage starts to drop or increase
+ * It returns with the loop count. Each loop takes several readings (532us)
+ */
+static inline int wait_for_voltage_change(int vdd_last)
+{
+ int timeout, vdd_current;
+
+ vdd_current = read_voltage();
+ /* wait until voltage starts to drop */
+ for (timeout = 0; abs(vdd_last - vdd_current) <= 4 &&
+ timeout < 100; timeout++) {
+ vdd_current = read_voltage();
+ }
+ if (timeout >= 100) {
+ printf("VID: Voltage adjustment timeout\n");
+ return -1;
+ }
+ return timeout;
+}
+
+/*
+ * argument 'wait' is the time we know the voltage difference can be measured
+ * this function keeps reading the voltage until it is stable
+ */
+static inline int wait_for_voltage_stable(int wait)
+{
+ int timeout, vdd_current, vdd_last;
+
+ vdd_last = read_voltage();
+ udelay(wait * NUM_READINGS * WAIT_FOR_ADC);
+ /* wait until voltage is stable */
+ vdd_current = read_voltage();
+ for (timeout = 0; abs(vdd_last - vdd_current) >= 4 &&
+ timeout < 100; timeout++) {
+ vdd_last = vdd_current;
+ udelay(wait * NUM_READINGS * WAIT_FOR_ADC);
+ vdd_current = read_voltage();
+ }
+ if (timeout >= 100) {
+ printf("VID: Voltage adjustment timeout\n");
+ return -1;
+ }
+
+ return vdd_current;
+}
+
+static inline int set_voltage(u8 vid)
+{
+ int wait, vdd_last;
+
+ vdd_last = read_voltage();
+ QIXIS_WRITE(brdcfg[6], vid);
+ wait = wait_for_voltage_change(vdd_last);
+ if (wait < 0)
+ return -1;
+ debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);
+ wait = wait ? wait : 1;
+
+ vdd_last = wait_for_voltage_stable(wait);
+ if (vdd_last < 0)
+ return -1;
+ debug("VID: Current voltage is %d mV\n", vdd_last);
+
+ return vdd_last;
+}
+
+
+static int adjust_vdd(ulong vdd_override)
+{
+ int re_enable = disable_interrupts();
+ ccsr_gur_t __iomem *gur =
+ (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 fusesr;
+ u8 vid, vid_current;
+ int vdd_target, vdd_current, vdd_last;
+ int ret;
+ unsigned long vdd_string_override;
+ char *vdd_string;
+ static const uint16_t vdd[32] = {
+ 0, /* unused */
+ 9875, /* 0.9875V */
+ 9750,
+ 9625,
+ 9500,
+ 9375,
+ 9250,
+ 9125,
+ 9000,
+ 8875,
+ 8750,
+ 8625,
+ 8500,
+ 8375,
+ 8250,
+ 8125,
+ 10000, /* 1.0000V */
+ 10125,
+ 10250,
+ 10375,
+ 10500,
+ 10625,
+ 10750,
+ 10875,
+ 11000,
+ 0, /* reserved */
+ };
+ struct vdd_drive {
+ u8 vid;
+ unsigned voltage;
+ };
+
+ ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR);
+ if (ret) {
+ debug("VID: I2c failed to switch channel\n");
+ ret = -1;
+ goto exit;
+ }
+
+ /* get the voltage ID from fuse status register */
+ fusesr = in_be32(&gur->dcfg_fusesr);
+ vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
+ FSL_CORENET_DCFG_FUSESR_VID_MASK;
+ if (vid == FSL_CORENET_DCFG_FUSESR_VID_MASK) {
+ vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
+ FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
+ }
+ vdd_target = vdd[vid];
+
+ /* check override variable for overriding VDD */
+ vdd_string = getenv("t4240qds_vdd_mv");
+ if (vdd_override == 0 && vdd_string &&
+ !strict_strtoul(vdd_string, 10, &vdd_string_override))
+ vdd_override = vdd_string_override;
+ if (vdd_override >= 819 && vdd_override <= 1212) {
+ vdd_target = vdd_override * 10; /* convert to 1/10 mV */
+ debug("VDD override is %lu\n", vdd_override);
+ } else if (vdd_override != 0) {
+ printf("Invalid value.\n");
+ }
+
+ if (vdd_target == 0) {
+ debug("VID: VID not used\n");
+ ret = 0;
+ goto exit;
+ } else {
+ /* round up and divice by 10 to get a value in mV */
+ vdd_target = DIV_ROUND_UP(vdd_target, 10);
+ debug("VID: vid = %d mV\n", vdd_target);
+ }
+
+ /*
+ * Check current board VID setting
+ * Voltage regulator support output to 6.250mv step
+ * The highes voltage allowed for this board is (vid=0x40) 1.21250V
+ * the lowest is (vid=0x7f) 0.81875V
+ */
+ vid_current = QIXIS_READ(brdcfg[6]);
+ vdd_current = 121250 - (vid_current - 0x40) * 625;
+ debug("VID: Current vid setting is (0x%x) %d mV\n",
+ vid_current, vdd_current/100);
+
+ /*
+ * Read voltage monitor to check real voltage.
+ * Voltage monitor LSB is 4mv.
+ */
+ vdd_last = read_voltage();
+ if (vdd_last < 0) {
+ printf("VID: Could not read voltage sensor abort VID adjustment\n");
+ ret = -1;
+ goto exit;
+ }
+ debug("VID: Core voltage is at %d mV\n", vdd_last);
+ /*
+ * Adjust voltage to at or 8mV above target.
+ * Each step of adjustment is 6.25mV.
+ * Stepping down too fast may cause over current.
+ */
+ while (vdd_last > 0 && vid_current < 0x80 &&
+ vdd_last > (vdd_target + 8)) {
+ vid_current++;
+ vdd_last = set_voltage(vid_current);
+ }
+ /*
+ * Check if we need to step up
+ * This happens when board voltage switch was set too low
+ */
+ while (vdd_last > 0 && vid_current >= 0x40 &&
+ vdd_last < vdd_target + 2) {
+ vid_current--;
+ vdd_last = set_voltage(vid_current);
+ }
+ if (vdd_last > 0)
+ printf("VID: Core voltage %d mV\n", vdd_last);
+ else
+ ret = -1;
+
+exit:
+ if (re_enable)
+ enable_interrupts();
+ return ret;
+}
+
/* Configure Crossbar switches for Front-Side SerDes Ports */
int config_frontside_crossbar_vsc3316(void)
{
setup_portals();
#endif
- /* Disable remote I2C connectoin */
- QIXIS_WRITE(brdcfg[5], BRDCFG5_RESET);
+ /* Disable remote I2C connection to qixis fpga */
+ QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE);
+
+ /*
+ * Adjust core voltage according to voltage ID
+ * This function changes I2C mux to channel 2.
+ */
+ if (adjust_vdd(0))
+ printf("Warning: Adjusting core voltage failed.\n");
/* Configure board SERDES ports crossbar */
config_frontside_crossbar_vsc3316();
unsigned long get_board_sys_clk(void)
{
u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+ /* use accurate clock measurement */
+ int freq = QIXIS_READ(clk_freq[0]) << 8 | QIXIS_READ(clk_freq[1]);
+ int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+ u32 val;
+
+ val = freq * base;
+ if (val) {
+ debug("SYS Clock measurement is: %d\n", val);
+ return val;
+ } else {
+ printf("Warning: SYS clock measurement is invalid, using value from brdcfg1.\n");
+ }
+#endif
switch (sysclk_conf & 0x0F) {
case QIXIS_SYSCLK_83:
unsigned long get_board_ddr_clk(void)
{
u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+#ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT
+ /* use accurate clock measurement */
+ int freq = QIXIS_READ(clk_freq[2]) << 8 | QIXIS_READ(clk_freq[3]);
+ int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]);
+ u32 val;
+
+ val = freq * base;
+ if (val) {
+ debug("DDR Clock measurement is: %d\n", val);
+ return val;
+ } else {
+ printf("Warning: DDR clock measurement is invalid, using value from brdcfg1.\n");
+ }
+#endif
switch ((ddrclk_conf & 0x30) >> 4) {
case QIXIS_DDRCLK_100:
sw = QIXIS_READ(brdcfg[2]);
for (i = 0; i < MAX_SERDES; i++) {
- unsigned int clock = (sw >> (2 * i)) & 3;
+ unsigned int clock = (sw >> (6 - 2 * i)) & 3;
switch (clock) {
case 0:
actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
#endif
}
+/*
+ * This function is called by bdinfo to print detail board information.
+ * As an exmaple for future board, we organize the messages into
+ * several sections. If applicable, the message is in the format of
+ * <name> = <value>
+ * It should aligned with normal output of bdinfo command.
+ *
+ * Voltage: Core, DDR and another configurable voltages
+ * Clock : Critical clocks which are not printed already
+ * RCW : RCW source if not printed already
+ * Misc : Other important information not in above catagories
+ */
+void board_detail(void)
+{
+ int i;
+ u8 brdcfg[16], dutcfg[16], rst_ctl;
+ int vdd, rcwsrc;
+ static const char * const clk[] = {"66.67", "100", "125", "133.33"};
+
+ for (i = 0; i < 16; i++) {
+ brdcfg[i] = qixis_read(offsetof(struct qixis, brdcfg[0]) + i);
+ dutcfg[i] = qixis_read(offsetof(struct qixis, dutcfg[0]) + i);
+ }
+
+ /* Voltage secion */
+ if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR)) {
+ vdd = read_voltage();
+ if (vdd > 0)
+ printf("Core voltage= %d mV\n", vdd);
+ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+ }
+
+ printf("XVDD = 1.%d V\n", ((brdcfg[8] & 0xf) - 4) * 5 + 25);
+
+ /* clock section */
+ printf("SYSCLK = %s MHz\nDDRCLK = %s MHz\n",
+ clk[(brdcfg[11] >> 2) & 0x3], clk[brdcfg[11] & 3]);
+
+ /* RCW section */
+ rcwsrc = (dutcfg[0] << 1) + (dutcfg[1] & 1);
+ puts("RCW source = ");
+ switch (rcwsrc) {
+ case 0x017:
+ case 0x01f:
+ puts("8-bit NOR\n");
+ break;
+ case 0x027:
+ case 0x02F:
+ puts("16-bit NOR\n");
+ break;
+ case 0x040:
+ puts("SDHC/eMMC\n");
+ break;
+ case 0x044:
+ puts("SPI 16-bit addressing\n");
+ break;
+ case 0x045:
+ puts("SPI 24-bit addressing\n");
+ break;
+ case 0x048:
+ puts("I2C normal addressing\n");
+ break;
+ case 0x049:
+ puts("I2C extended addressing\n");
+ break;
+ case 0x108:
+ case 0x109:
+ case 0x10a:
+ case 0x10b:
+ puts("8-bit NAND, 2KB\n");
+ break;
+ default:
+ if ((rcwsrc >= 0x080) && (rcwsrc <= 0x09f))
+ puts("Hard-coded RCW\n");
+ else if ((rcwsrc >= 0x110) && (rcwsrc <= 0x11f))
+ puts("8-bit NAND, 4KB\n");
+ else
+ puts("unknown\n");
+ break;
+ }
+
+ /* Misc section */
+ rst_ctl = QIXIS_READ(rst_ctl);
+ puts("HRESET_REQ = ");
+ switch (rst_ctl & 0x30) {
+ case 0x00:
+ puts("Ignored\n");
+ break;
+ case 0x10:
+ puts("Assert HRESET\n");
+ break;
+ case 0x30:
+ puts("Reset system\n");
+ break;
+ default:
+ puts("N/A\n");
+ break;
+ }
+}
+
/*
* Reverse engineering switch settings.
* Some bits cannot be figured out. They will be displayed as
* Any bit with 1 means that bit cannot be reverse engineered.
* It will be displayed as _ in binary format.
*/
- static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xdf, 0x3f, 0x1f};
+ static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xcf, 0x3f, 0x1f};
char buf[10];
u8 brdcfg[16], dutcfg[16];
sw[5] = ((brdcfg[0] & 0x0f) << 4) | \
((QIXIS_READ(rst_ctl) & 0x30) >> 2) | \
((brdcfg[0] & 0x40) >> 5);
- sw[6] = (brdcfg[11] & 0x20);
+ sw[6] = (brdcfg[11] & 0x20) |
+ ((brdcfg[5] & 0x02) << 3);
sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | \
((brdcfg[5] & 0x10) << 2);
sw[8] = ((brdcfg[12] & 0x08) << 4) | \
i + 1, byte_to_binary_mask(sw[i], mask[i], buf), sw[i]);
}
}
+
+static int do_vdd_adjust(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ ulong override;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ if (!strict_strtoul(argv[1], 10, &override))
+ adjust_vdd(override); /* the value is checked by callee */
+ else
+ return CMD_RET_USAGE;
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ vdd_override, 2, 0, do_vdd_adjust,
+ "Override VDD",
+ "- override with the voltage specified in mV, eg. 1050"
+);
projects / karo-tx-uboot.git / blobdiff