karo: add workaround for Linux hang on i.MX6QP when tzasc1_ipg_clock is disabled

[karo-tx-uboot.git] / board / karo / tx6 / lowlevel_init.S

diff --git a/board/karo/tx6/lowlevel_init.S b/board/karo/tx6/lowlevel_init.S
index d9abf72d4e106688dec05d6bfe834a6de433ebd7..c70dbbe7c54f665348663e9c1e11fe8e85057cc6 100644 (file)
--- a/board/karo/tx6/lowlevel_init.S
+++ b/board/karo/tx6/lowlevel_init.S
@@ -780,18 +780,6 @@ dcd_hdr:
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_EIM_DATA28, 0x0000f079)
        MXC_DCD_ITEM(IOMUXC_SW_SEL_INPUT_PAD_EIM_DATA21, TX6_I2C1_SEL_INP_VAL)
        MXC_DCD_ITEM(IOMUXC_SW_SEL_INPUT_PAD_EIM_DATA28, TX6_I2C1_SEL_INP_VAL)
-
-       /* ENET_REF_CLK */
-       MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_GPIO16, 0x00000012)
-       /* ETN PHY nRST */
-       MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_SD3_DATA2, 0x00000015)
-       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2, 0x000030b0)
-       /* ETN PHY Power */
-       MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_EIM_DATA20, 0x00000015)
-       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_EIM_DATA20, 0x000030b0)
-       /* RESET_OUT GPIO_7_12 */
-       MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_GPIO17, 0x00000005)
-       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_GPIO17, 0x000030b0)
 #ifndef CONFIG_TX6_EMMC
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_CLR)
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR4, CCGR(14))
@@ -806,13 +794,17 @@ dcd_hdr:
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR4, CCGR(14))
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR2, CCGR(7))
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_WRITE)
-#endif
+#endif /* CONFIG_TX6_EMMC */
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CHSCCDR, 0x00012093) /* default: 0x0002a150 (0x00029148) */
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CSCDR2, 0x00012090) /* default: 0x0002a150 (0x00029148) */
        MXC_DCD_ITEM(ANATOP_BASE_ADDR + ANATOP_PLL_ENET, 0x00002001) /* ENET PLL */
 
        /* enable all relevant clocks... */
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_SET)
+#ifdef CONFIG_TX6QP
+       /* workaround for hangup on i.MX6QP when IPU is being used */
+       MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR2, CCGR(11) | CCGR(12))
+#endif
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR0, CCGR(2)) /* 0xf0c03f3f default: 0xf0c03f0f APBH-DMA */
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR1, CCGR(5)) /* 0xf0fc0c00 default: 0xf0fc0000 ENET */
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR2, CCGR(3)) /* 0xfc3fc0cc default: 0xfc3fc00c I2C1 */