Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / board / kmc / kzm9g / kzm9g.c

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 54f25e097cbc4868f637f6c94d0883e6c4c42674..b669ffefecdc822f2347e60b9b8dae57dc8cc7d2 100644 (file)
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  * (C) Copyright 2012 Renesas Solutions Corp.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -84,7 +68,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
        writel(0x0017040a, &sbsc->sdwcr01);
        writel(0x31020707, &sbsc->sdwcr10);
        writel(0x0017040a, &sbsc->sdwcr11);
-       writel(0x05555555, &sbsc->sddrvcr0);
+       writel(0x055557ff, &sbsc->sddrvcr0); /* Enlarge drivability of LPDQS0-3, LPCLK */
        writel(0x30000000, &sbsc->sdwcr2);
 
        writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr);
@@ -112,7 +96,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
                writel(0x0, SDMRA1A);
                writel(0x00000402, &sbsc->sdmracr0);
                writel(0x0, SDMRA1A);
-               writel(0x00000403, &sbsc->sdmracr0);
+               writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */
                writel(0x0, SDMRA1A);
                writel(0x0, SDMRA2A);
        } else {
@@ -120,7 +104,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
                writel(0x0, SDMRA1B);
                writel(0x00000402, &sbsc->sdmracr0);
                writel(0x0, SDMRA1B);
-               writel(0x00000403, &sbsc->sdmracr0);
+               writel(0x00000203, &sbsc->sdmracr0); /* MR3 register DS=2 */
                writel(0x0, SDMRA1B);
                writel(0x0, SDMRA2B);
        }
@@ -195,7 +179,7 @@ void s_init(void)
 
        /* FRQCR Init */
        writel(0x0012453C, &cpg->frqcra);
-       writel(0x80331350, &cpg->frqcrb);
+       writel(0x80431350, &cpg->frqcrb);    /* ETM TRCLK  78MHz */
        cmp_loop(&cpg->frqcrb, 0x80000000, 0x0);
        writel(0x00000B0B, &cpg->frqcrd);
        cmp_loop(&cpg->frqcrd, 0x80000000, 0x0);
@@ -301,8 +285,19 @@ int board_early_init_f(void)
        return 0;
 }
 
+void adjust_core_voltage(void)
+{
+       u8 data;
+
+       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       data = 0x35;
+       i2c_set_bus_num(0);
+       i2c_write(0x40, 3, 1, &data, 1);
+}
+
 int board_init(void)
 {
+       adjust_core_voltage();
        sh73a0_pinmux_init();
 
     /* SCIFA 4 */