avr32: Add simple paging support

[karo-tx-uboot.git] / board / mimc / mimc200 / mimc200.c

diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 6df741e397625add6a906d88e21f09ea121154bd..470adba79485774b9ea16725926a9aa5ed652f48 100644 (file)
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -27,10 +27,60 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/hmatrix.h>
+#include <asm/arch/mmu.h>
 #include <asm/arch/portmux.h>
+#include <atmel_lcdc.h>
 #include <lcd.h>
 
-#include "../../../cpu/at32ap/hsmc3.h"
+#include "../../../arch/avr32/cpu/hsmc3.h"
+
+struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
+       {
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+                                       | MMU_VMR_CACHE_NONE,
+       }, {
+               .virt_pgno      = EBI_SRAM_CS2_BASE >> PAGE_SHIFT,
+               .nr_pages       = EBI_SRAM_CS2_SIZE >> PAGE_SHIFT,
+               .phys           = (EBI_SRAM_CS2_BASE >> PAGE_SHIFT)
+                                       | MMU_VMR_CACHE_NONE,
+       }, {
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+                                       | MMU_VMR_CACHE_WRBACK,
+       },
+};
+
+#if defined(CONFIG_LCD)
+/* 480x272x16 @ 72 Hz */
+vidinfo_t panel_info = {
+       .vl_col                 = 480,          /* Number of columns */
+       .vl_row                 = 272,          /* Number of rows */
+       .vl_clk                 = 5000000,      /* pixel clock in ps */
+       .vl_sync                = ATMEL_LCDC_INVCLK_INVERTED |
+                                 ATMEL_LCDC_INVLINE_INVERTED |
+                                 ATMEL_LCDC_INVFRAME_INVERTED,
+       .vl_bpix                = LCD_COLOR16,  /* Bits per pixel, BPP = 2^n */
+       .vl_tft                 = 1,            /* 0 = passive, 1 = TFT */
+       .vl_hsync_len           = 42,           /* Length of horizontal sync */
+       .vl_left_margin         = 1,            /* Time from sync to picture */
+       .vl_right_margin        = 1,            /* Time from picture to sync */
+       .vl_vsync_len           = 1,            /* Length of vertical sync */
+       .vl_upper_margin        = 12,           /* Time from sync to picture */
+       .vl_lower_margin        = 1,            /* Time from picture to sync */
+       .mmio                   = LCDC_BASE,    /* Memory mapped registers */
+};
+
+void lcd_enable(void)
+{
+}
+
+void lcd_disable(void)
+{
+}
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -110,6 +160,10 @@ int board_early_init_f(void)
        portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
 #endif
 
+#if defined(CONFIG_LCD)
+       portmux_enable_lcdc(1);
+#endif
+
        return 0;
 }
 
@@ -119,13 +173,11 @@ phys_size_t initdram(int board_type)
        unsigned long actual_size;
        void *sdram_base;
 
-       sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+       sdram_base = uncached(EBI_SDRAM_BASE);
 
        expected_size = sdram_init(sdram_base, &sdram_config);
        actual_size = get_ram_size(sdram_base, expected_size);
 
-       unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
-
        if (expected_size != actual_size)
                printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
                                actual_size >> 20, expected_size >> 20);