Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[karo-tx-uboot.git] / board / motionpro / motionpro.c

diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c
index d60d23332b178b9285d50e7a7b9ff0bd3a6edd41..4d0ebaab74567008c5718cd082fcfe1e751c5a3d 100644 (file)
--- a/board/motionpro/motionpro.c
+++ b/board/motionpro/motionpro.c
@@ -5,30 +5,19 @@
  * modified for Promess PRO - by Andy Joseph, andy@promessdev.com
  * modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
  * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
- * Also changed the refresh for 100Mhz operation
+ * Also changed the refresh for 100MHz operation
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <mpc5xxx.h>
+#include <miiphy.h>
+#include <libfdt.h>
 
+#if defined(CONFIG_STATUS_LED)
+#include <status_led.h>
+#endif /* CONFIG_STATUS_LED */
 
 /* Kollmorgen DPR initialization data */
 struct init_elem {
@@ -75,11 +64,27 @@ int board_early_init_r(void)
 }
 
 
-#ifndef CFG_RAMBOOT
+/*
+ * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(),
+ * PHY goes into FX mode.  To take it out of the FX mode and switch into
+ * desired TX operation, one needs to clear the FX_SEL bit of Mode Control
+ * Register.
+ */
+void reset_phy(void)
+{
+       unsigned short mode_control;
+
+       miiphy_read("FEC", CONFIG_PHY_ADDR, 0x15, &mode_control);
+       miiphy_write("FEC", CONFIG_PHY_ADDR, 0x15,
+                       mode_control & 0xfffe);
+       return;
+}
+
+#ifndef CONFIG_SYS_RAMBOOT
 /*
  * Helper function to initialize SDRAM controller.
  */
-static void sdram_start (int hi_addr)
+static void sdram_start(int hi_addr)
 {
        long hi_addr_bit = hi_addr ? 0x01000000 : 0;
 
@@ -105,18 +110,24 @@ static void sdram_start (int hi_addr)
        /* normal operation */
        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
 }
-#endif /* !CFG_RAMBOOT */
+#endif /* !CONFIG_SYS_RAMBOOT */
 
 
 /*
  * Initalize SDRAM - configure SDRAM controller, detect memory size.
  */
-long int initdram (int board_type)
+phys_size_t initdram(int board_type)
 {
        ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
        ulong test1, test2;
 
+       /* According to AN3221 (MPC5200B SDRAM Initialization and
+        * Configuration), the SDelay register must be written a value of
+        * 0x00000004 as the first step of the SDRAM contorller configuration.
+        */
+       *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+
        /* configure SDRAM start/end for detection */
        *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
        *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
@@ -126,9 +137,9 @@ long int initdram (int board_type)
        *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
 
        sdram_start(0);
-       test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+       test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
        sdram_start(1);
-       test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+       test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
        if (test1 > test2) {
                sdram_start(0);
                dramsize = test1;
@@ -151,22 +162,59 @@ long int initdram (int board_type)
        /* let SDRAM CS1 start right after CS0 and disable it */
        *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
 
-#else /* !CFG_RAMBOOT */
+#else /* !CONFIG_SYS_RAMBOOT */
        /* retrieve size of memory connected to SDRAM CS0 */
        dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
        if (dramsize >= 0x13)
                dramsize = (1 << (dramsize - 0x13)) << 20;
        else
                dramsize = 0;
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_RAMBOOT */
 
        /* return total ram size */
        return dramsize;
 }
 
 
-int checkboard (void)
+int checkboard(void)
 {
-       puts("Board: Promess Motion-PRO board\n");
+       uchar rev = *(vu_char *)CPLD_REV_REGISTER;
+       printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
        return 0;
 }
+
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, bd_t *bd)
+{
+       ft_cpu_setup(blob, bd);
+
+       return 0;
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+
+#if defined(CONFIG_STATUS_LED)
+void __led_init(led_id_t regaddr, int state)
+{
+       *((vu_long *) regaddr) |= ENABLE_GPIO_OUT;
+
+       if (state == STATUS_LED_ON)
+               *((vu_long *) regaddr) |= LED_ON;
+       else
+               *((vu_long *) regaddr) &= ~LED_ON;
+}
+
+void __led_set(led_id_t regaddr, int state)
+{
+       if (state == STATUS_LED_ON)
+               *((vu_long *) regaddr) |= LED_ON;
+       else
+               *((vu_long *) regaddr) &= ~LED_ON;
+}
+
+void __led_toggle(led_id_t regaddr)
+{
+       *((vu_long *) regaddr) ^= LED_ON;
+}
+#endif /* CONFIG_STATUS_LED */