#include <common.h>
#if !defined(CONFIG_PATI)
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
#include <asm/processor.h>
#include "common_util.h"
#if defined(CONFIG_MIP405)
#include <mpc5xx.h>
#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
*/
* The board_init_r will fill in wrong values in the board init structure,
* but this will be fixed in the misc_init_r routine:
* bd->bi_flashstart=0-flash_info[0].size
- * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
+ * bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN
* bd->bi_flashoffset=0
*
*/
{
unsigned long pbcr;
int res = 0;
- pbcr = mfdcr (strap);
+ pbcr = mfdcr (CPC0_PSR);
if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
/* boot via MPS or MPS mapping */
res = BOOT_MPS;
/* first findout on which cs the flash is */
if(mode & BOOT_MPS) {
/* map flash high on CS1 and MPS on CS0 */
- mtdcr (ebccfga, pb0ap);
- mtdcr (ebccfgd, MPS_AP);
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, MPS_CR);
+ mtdcr (EBC0_CFGADDR, PB0AP);
+ mtdcr (EBC0_CFGDATA, MPS_AP);
+ mtdcr (EBC0_CFGADDR, PB0CR);
+ mtdcr (EBC0_CFGDATA, MPS_CR);
/* we use the default values (max values) for the flash
* because its real size is not yet known */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, FLASH_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, FLASH_CR_B);
+ mtdcr (EBC0_CFGADDR, PB1AP);
+ mtdcr (EBC0_CFGDATA, FLASH_AP);
+ mtdcr (EBC0_CFGADDR, PB1CR);
+ mtdcr (EBC0_CFGDATA, FLASH_CR_B);
}
else {
/* map flash high on CS0 and MPS on CS1 */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, MPS_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, MPS_CR);
+ mtdcr (EBC0_CFGADDR, PB1AP);
+ mtdcr (EBC0_CFGDATA, MPS_AP);
+ mtdcr (EBC0_CFGADDR, PB1CR);
+ mtdcr (EBC0_CFGDATA, MPS_CR);
/* we use the default values (max values) for the flash
* because its real size is not yet known */
- mtdcr (ebccfga, pb0ap);
- mtdcr (ebccfgd, FLASH_AP);
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, FLASH_CR_B);
+ mtdcr (EBC0_CFGADDR, PB0AP);
+ mtdcr (EBC0_CFGDATA, FLASH_AP);
+ mtdcr (EBC0_CFGADDR, PB0CR);
+ mtdcr (EBC0_CFGDATA, FLASH_CR_B);
}
}
int i;
#if !defined(CONFIG_PATI)
- unsigned long size_b1,flashcr,size_reg;
+ unsigned long flashcr,size_reg;
int mode;
extern char version_string;
- char *p=&version_string;
+ char *p = &version_string;
/* Since we are relocated, we can set-up the CS finally */
setup_cs_reloc();
"MPS" : "Flash");
#endif /* #if !defined(CONFIG_PATI) */
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
+ size_b0 = flash_get_size((vu_long *)CONFIG_SYS_MONITOR_BASE, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
}
/* protect the bootloader */
/* Monitor protection ON by default */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
#if !defined(CONFIG_PATI)
/* protect reset vector */
flash_info[0].protect[flash_info[0].sector_count-1] = 1;
- size_b1 = 0 ;
flash_info[0].size = size_b0;
/* set up flash cs according to the size */
size_reg=(flash_info[0].size >>20);
}
if(mode & BOOT_MPS) {
/* flash is on CS1 */
- mtdcr(ebccfga, pb1cr);
- flashcr = mfdcr (ebccfgd);
+ mtdcr(EBC0_CFGADDR, PB1CR);
+ flashcr = mfdcr (EBC0_CFGDATA);
/* we map the flash high in every case */
flashcr&=0x0001FFFF; /* mask out address bits */
flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
flashcr|= (i << 17); /* size addr */
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, flashcr);
+ mtdcr(EBC0_CFGADDR, PB1CR);
+ mtdcr(EBC0_CFGDATA, flashcr);
}
else {
/* flash is on CS0 */
- mtdcr(ebccfga, pb0cr);
- flashcr = mfdcr (ebccfgd);
+ mtdcr(EBC0_CFGADDR, PB0CR);
+ flashcr = mfdcr (EBC0_CFGDATA);
/* we map the flash high in every case */
flashcr&=0x0001FFFF; /* mask out address bits */
flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
flashcr|= (i << 17); /* size addr */
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, flashcr);
+ mtdcr(EBC0_CFGADDR, PB0CR);
+ mtdcr(EBC0_CFGDATA, flashcr);
}
#if 0
/* enable this (PIP405/MIP405 only) if you want to test if
the relocation has be done ok.
This will disable both Chipselects */
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, 0L);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, 0L);
+ mtdcr (EBC0_CFGADDR, PB0CR);
+ mtdcr (EBC0_CFGDATA, 0L);
+ mtdcr (EBC0_CFGADDR, PB1CR);
+ mtdcr (EBC0_CFGDATA, 0L);
printf("CS0 & CS1 switched off for test\n");
#endif
/* patch version_string */
p++;
}
#else /* #if !defined(CONFIG_PATI) */
-#ifdef CFG_ENV_IS_IN_FLASH
+#ifdef CONFIG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
&flash_info[0]);
#endif
#endif /* #if !defined(CONFIG_PATI) */
return (0); /* no or unknown flash */
}
value = addr2[1]; /* device ID */
- /* printf("Device value %x\n",value); */
+ /* printf("Device value %x\n",value); */
switch (value) {
case (FLASH_WORD_SIZE)AMD_ID_F040B:
info->flash_id += FLASH_AM040;
start = get_timer (0);
last = start;
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return ERR_TIMOUT;
}
start = get_timer (0);
last = start;
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return ERR_TIMOUT;
}
{
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
+ int flag, prot, sect;
int i, rcode = 0;
printf ("\n");
}
- l_sect = -1;
-
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
rcode |= wait_for_DQ7(info, sect);
}
}
- l_sect = sect;
/*
* Wait for each sector to complete, it's more
* reliable. According to AMD Spec, you must
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7(info, l_sect);
-
-DONE:
-#endif
/* reset to read mode */
addr = (FLASH_WORD_SIZE *)info->start[0];
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
+ volatile FLASH_WORD_SIZE *addr2 = (volatile FLASH_WORD_SIZE *)(info->start[0]);
+ volatile FLASH_WORD_SIZE *dest2 = (volatile FLASH_WORD_SIZE *)dest;
+ volatile FLASH_WORD_SIZE *data2;
ulong start;
+ ulong *data_p;
int flag;
int i;
+ data_p = &data;
+ data2 = (volatile FLASH_WORD_SIZE *)data_p;
+
/* Check if Flash is (sufficiently) erased */
if ((*((volatile FLASH_WORD_SIZE *)dest) &
(FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
udelay(10);
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
{
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
return (1);
}
dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
start = get_timer (0);
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
projects / karo-tx-uboot.git / blobdiff