/*
- *(C) Copyright 2005-2007 Netstal Maschinen AG
+ *(C) Copyright 2005-2008 Netstal Maschinen AG
* Niklaus Giger (Niklaus.Giger@netstal.com)
*
* This source code is free software; you can redistribute it
#include <ppc4xx.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm-ppc/u-boot.h>
+#include <asm/u-boot.h>
#include "../common/nm.h"
DECLARE_GLOBAL_DATA_PTR;
#define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
-#define SYS_SLOT_ADDRESS (0x7C000000 + 0x400000)
-#define HCU3_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
+#define HCU_SLOT_ADDRESS (0x7C000000 + 0x400000)
+#define HCU_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
#define HCU_SW_INSTALL_REQUESTED 0x10
-#undef DEBUG
-
-#if defined(DEBUG)
-void show_sdram_registers(void);
-#endif
-long int fixed_hcu4_sdram (unsigned int dram_size);
-
/*
* This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
* of being in the init_sequence array.
*
* The SDRAM has been initialized already -- start.S:start called
* anything, not even stack. So be careful.
*/
-#define CPC0_CR0 0xb1 /* Chip control register 0 */
-#define CPC0_CR1 0xb2 /* Chip control register 1 */
/* Attention: If you want 1 microsecs times from the external oscillator
- * use 0x00804051. But this causes problems with u-boot and linux!
+ * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
+ * 0x00804051 causes problems with u-boot and linux!
*/
#define CPC0_CR0_VALUE 0x0030103c
#define CPC0_CR1_VALUE 0x00004051
-#define CPC0_ECR 0xaa /* Edge condition register */
-#define EBC0_CFG 0x23 /* External Peripheral Control Register */
-#define CPC0_EIRR 0xb6 /* External Interrupt Register */
-
int board_early_init_f (void)
{
* IRQ 17-24 RESERVED/UNUSED
* IRQ 31 (EXT IRQ 6) (unused)
*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFE000); /* set int polarities */
- mtdcr (uictr, 0x00000000); /* set int trigger levels */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(UIC0ER, 0x00000000); /* disable all ints */
+ mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
+ mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
+ mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
+ mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
- mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
- mtdcr(CPC0_ECR, 0x60606000);
- mtdcr(CPC0_EIRR, 0x7c000000);
+ mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
+ mtdcr(CPC0_ECR, 0x60606000);
+ mtdcr(CPC0_EIRR, 0x7C000000);
return 0;
}
int sys_install_requested(void)
{
- u16 *ioValuePtr = (u16 *)HCU3_DIGITAL_IO_REGISTER;
- return (in_be16(ioValuePtr) & HCU_SW_INSTALL_REQUESTED) != 0;
+ u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER);
+ return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0;
}
int checkboard (void)
{
- u16 *boardVersReg = (u16 *)HCU_MACH_VERSIONS_REGISTER;
- u16 generation = in_be16(boardVersReg) & 0xf0;
- u16 index = in_be16(boardVersReg) & 0x0f;
+ u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
+ u16 generation = boardVersReg & 0xf0;
+ u16 index = boardVersReg & 0x0f;
- /* Cannot be done, in board_early_init */
+ /* Cannot be done in board_early_init */
mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
+
/* Force /RTS to active. The board it not wired quite
* correctly to use cts/rtc flow control, so just force the
* /RST active and forget about it.
out_be32((u32 *)GPIO0_OR, tmp);
}
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram or initdram
- * used for HCUx
- */
-void sdram_init(void)
-{
- return;
-}
-
/*
* hcu_get_slot
*/
u32 hcu_get_slot(void)
{
- u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
- return in_be16(slot) & 0x7f;
+ u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS);
+ return slot & 0x7f;
}
/*
*/
u32 get_serial_number(void)
{
- u32 *serial = (u32 *)CFG_FLASH_BASE;
+ u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
- if (in_be32(serial) == 0xffffffff)
+ if (serial == 0xffffffff)
return 0;
- return in_be32(serial);
+ return serial;
}
return 0;
}
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
long dram_size = 0;
- u16 *boardVersReg = (u16 *) HCU_MACH_VERSIONS_REGISTER;
- u16 generation = in_be16(boardVersReg) & 0xf0;
- if (generation == HW_GENERATION_HCU3)
- dram_size = 32*1024*1024;
- else dram_size = 64*1024*1024;
- fixed_hcu4_sdram(dram_size);
+ u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
+ u16 generation = boardVersReg & 0xf0;
+ u16 index = boardVersReg & 0x0f;
+
+ if (generation == HW_GENERATION_HCU3 && index < 0xf)
+ dram_size = 32 << 20; /* 32 MB - RAM */
+ else
+ dram_size = 64 << 20; /* 64 MB - RAM */
+ init_ppc405_sdram(dram_size);
#ifdef DEBUG
show_sdram_registers();
return dram_size;
}
-#if defined(CONFIG_POST)
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif /* CONFIG_POST */
-
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+/*
+ * Hardcoded flash setup:
+ * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
+ */
+ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
+{
+ if (banknum == 0) { /* non-CFI boot flash */
+ info->portwidth = 1;
+ info->chipwidth = 1;
+ info->interface = FLASH_CFI_X8;
+ return 1;
+ } else
+ return 0;
+}
projects / karo-tx-uboot.git / blobdiff