ARM: highbank: use default prompt

[karo-tx-uboot.git] / board / prodrive / common / fpga.c

diff --git a/board/prodrive/common/fpga.c b/board/prodrive/common/fpga.c
index f9412a21ebd5ac541d57a0bff76e5429a4bc74c7..9dce131376d0e1cde39e7490b6f78896a0ecd0a7 100644 (file)
--- a/board/prodrive/common/fpga.c
+++ b/board/prodrive/common/fpga.c
@@ -6,23 +6,7 @@
  * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -37,11 +21,11 @@
 #define DBG(x...)
 #endif /* DEBUG */
 
-#define FPGA_PRG               CFG_FPGA_PRG /* FPGA program pin (cpu output)*/
-#define FPGA_CLK               CFG_FPGA_CLK /* FPGA clk pin (cpu output)    */
-#define FPGA_DATA              CFG_FPGA_DATA /* FPGA data pin (cpu output)  */
-#define FPGA_DONE              CFG_FPGA_DONE /* FPGA done pin (cpu input)   */
-#define FPGA_INIT              CFG_FPGA_INIT /* FPGA init pin (cpu input)   */
+#define FPGA_PRG               CONFIG_SYS_FPGA_PRG /* FPGA program pin (cpu output)*/
+#define FPGA_CLK               CONFIG_SYS_FPGA_CLK /* FPGA clk pin (cpu output)    */
+#define FPGA_DATA              CONFIG_SYS_FPGA_DATA /* FPGA data pin (cpu output)  */
+#define FPGA_DONE              CONFIG_SYS_FPGA_DONE /* FPGA done pin (cpu input)   */
+#define FPGA_INIT              CONFIG_SYS_FPGA_INIT /* FPGA init pin (cpu input)   */
 
 #define ERROR_FPGA_PRG_INIT_LOW  -1        /* Timeout after PRG* asserted   */
 #define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */