if ARCH_SUNXI
+# Note only one of these may be selected at a time! But hidden choices are
+# not supported by Kconfig
+config SUNXI_GEN_SUN4I
+ bool
+ ---help---
+ Select this for sunxi SoCs which have resets and clocks set up
+ as the original A10 (mach-sun4i).
+
+config SUNXI_GEN_SUN6I
+ bool
+ ---help---
+ Select this for sunxi SoCs which have sun6i like periphery, like
+ separate ahb reset control registers, custom pmic bus, new style
+ watchdog, etc.
+
+
choice
prompt "Sunxi SoC Variant"
+ optional
config MACH_SUN4I
bool "sun4i (Allwinner A10)"
select CPU_V7
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
select CPU_V7
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
-config MACH_SUN8I
+config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN6I
+ select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
+config MACH_SUN8I_A33
+ bool "sun8i (Allwinner A33)"
+ select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
+config MACH_SUN9I
+ bool "sun9i (Allwinner A80)"
+ select CPU_V7
+ select SUNXI_GEN_SUN6I
endchoice
+# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
+config MACH_SUN8I
+ bool
+ default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
+
+
config DRAM_CLK
int "sunxi dram clock speed"
default 312 if MACH_SUN6I || MACH_SUN8I
default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
---help---
Set the dram clock speed, valid range 240 - 480, must be a multiple
- of 24. Note on sun4i / sun5i / sun7i this is only used by boards
- which use dram autoconfig.
+ of 24.
+
+if MACH_SUN5I || MACH_SUN7I
+config DRAM_MBUS_CLK
+ int "sunxi mbus clock speed"
+ default 300
+ ---help---
+ Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
+
+endif
config DRAM_ZQ
int "sunxi dram zq value"
default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
default 127 if MACH_SUN7I
---help---
- Set the dram zq value. Note on sun4i / sun5i / sun7i this is only
- used by boards which use dram autoconfig.
+ Set the dram zq value.
+
+config DRAM_ODT_EN
+ bool "sunxi dram odt enable"
+ default n if !MACH_SUN8I_A23
+ default y if MACH_SUN8I_A23
+ ---help---
+ Select this to enable dram odt (on die termination).
if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
config DRAM_EMR1
default 0 if MACH_SUN4I
default 4 if MACH_SUN5I || MACH_SUN7I
---help---
- Set the dram controller emr1 value. Note this is only used by boards
- which use dram autoconfig.
-endif
+ Set the dram controller emr1 value.
-config SYS_CONFIG_NAME
- default "sun4i" if MACH_SUN4I
- default "sun5i" if MACH_SUN5I
- default "sun6i" if MACH_SUN6I
- default "sun7i" if MACH_SUN7I
- default "sun8i" if MACH_SUN8I
+config DRAM_TPR3
+ hex "sunxi dram tpr3 value"
+ default 0
+ ---help---
+ Set the dram controller tpr3 parameter. This parameter configures
+ the delay on the command lane and also phase shifts, which are
+ applied for sampling incoming read data. The default value 0
+ means that no phase/delay adjustments are necessary. Properly
+ configuring this parameter increases reliability at high DRAM
+ clock speeds.
+
+config DRAM_DQS_GATING_DELAY
+ hex "sunxi dram dqs_gating_delay value"
+ default 0
+ ---help---
+ Set the dram controller dqs_gating_delay parmeter. Each byte
+ encodes the DQS gating delay for each byte lane. The delay
+ granularity is 1/4 cycle. For example, the value 0x05060606
+ means that the delay is 5 quarter-cycles for one lane (1.25
+ cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
+ The default value 0 means autodetection. The results of hardware
+ autodetection are not very reliable and depend on the chip
+ temperature (sometimes producing different results on cold start
+ and warm reboot). But the accuracy of hardware autodetection
+ is usually good enough, unless running at really high DRAM
+ clocks speeds (up to 600MHz). If unsure, keep as 0.
choice
- prompt "Board"
-
-config TARGET_A10S_OLINUXINO_M
- bool "A10S_OLINUXINO_M"
- depends on MACH_SUN5I
-
-config TARGET_A13_OLINUXINOM
- bool "A13_OLINUXINOM"
- depends on MACH_SUN5I
-
-config TARGET_A13_OLINUXINO
- bool "A13_OLINUXINO"
- depends on MACH_SUN5I
-
-config TARGET_A20_OLINUXINO_L2
- bool "A20_OLINUXINO_L2"
- depends on MACH_SUN7I
-
-config TARGET_A20_OLINUXINO_L
- bool "A20_OLINUXINO_L"
- depends on MACH_SUN7I
-
-config TARGET_A20_OLINUXINO_M
- bool "A20_OLINUXINO_M"
- depends on MACH_SUN7I
-
-config TARGET_AUXTEK_T004
- bool "AUXTEK_T004"
- depends on MACH_SUN5I
-
-config TARGET_BANANAPI
- bool "BANANAPI"
- depends on MACH_SUN7I
-
-config TARGET_BANANAPRO
- bool "BANANAPRO"
- depends on MACH_SUN7I
-
-config TARGET_CUBIEBOARD2
- bool "CUBIEBOARD2"
- depends on MACH_SUN7I
+ prompt "sunxi dram timings"
+ default DRAM_TIMINGS_VENDOR_MAGIC
+ ---help---
+ Select the timings of the DDR3 chips.
-config TARGET_CUBIETRUCK
- bool "CUBIETRUCK"
- depends on MACH_SUN7I
+config DRAM_TIMINGS_VENDOR_MAGIC
+ bool "Magic vendor timings from Android"
+ ---help---
+ The same DRAM timings as in the Allwinner boot0 bootloader.
-config TARGET_PCDUINO3
- bool "PCDUINO3"
- depends on MACH_SUN7I
+config DRAM_TIMINGS_DDR3_1066F_1333H
+ bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
+ ---help---
+ Use the timings of the standard JEDEC DDR3-1066F speed bin for
+ DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
+ for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
+ used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
+ or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
+ that down binning to DDR3-1066F is supported (because DDR3-1066F
+ uses a bit faster timings than DDR3-1333H).
+
+config DRAM_TIMINGS_DDR3_800E_1066G_1333J
+ bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
+ ---help---
+ Use the timings of the slowest possible JEDEC speed bin for the
+ selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
+ DDR3-800E, DDR3-1066G or DDR3-1333J.
-config TARGET_MELE_M3
- bool "MELE_M3"
- depends on MACH_SUN7I
+endchoice
-config TARGET_MK802_A10S
- bool "MK802_A10S"
- depends on MACH_SUN5I
+endif
-config TARGET_MSI_PRIMO73
- bool "MSI Primo73 (7\" tablet)"
- depends on MACH_SUN7I
+if MACH_SUN8I_A23
+config DRAM_ODT_CORRECTION
+ int "sunxi dram odt correction value"
+ default 0
---help---
- The MSI Primo73 is an A20 based tablet, with 1G RAM, 16G NAND,
- 1024x600 TN LCD display, mono speaker, 0.3 MP front camera, 2.0 MP
- rear camera, 3000 mAh battery, gt911 touchscreen, mma8452 accelerometer
- and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons
- (both volume buttons are also connected to the UBOOT_SEL pin). The
- external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB
- OTG and 3.5mm headphone jack. More details are available at
- http://linux-sunxi.org/MSI_Primo73
-
-config TARGET_I12_TVBOX
- bool "I12_TVBOX"
- depends on MACH_SUN7I
-
-config TARGET_QT840A
- bool "QT840A"
- depends on MACH_SUN7I
+ Set the dram odt correction value (range -255 - 255). In allwinner
+ fex files, this option is found in bits 8-15 of the u32 odt_en variable
+ in the [dram] section. When bit 31 of the odt_en variable is set
+ then the correction is negative. Usually the value for this is 0.
+endif
-config TARGET_R7DONGLE
- bool "R7DONGLE"
- depends on MACH_SUN5I
+config SYS_CLK_FREQ
+ default 912000000 if MACH_SUN7I
+ default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
-endchoice
+config SYS_CONFIG_NAME
+ default "sun4i" if MACH_SUN4I
+ default "sun5i" if MACH_SUN5I
+ default "sun6i" if MACH_SUN6I
+ default "sun7i" if MACH_SUN7I
+ default "sun8i" if MACH_SUN8I
+ default "sun9i" if MACH_SUN9I
config SYS_BOARD
default "sunxi"
config SYS_SOC
default "sunxi"
-config SPL_FEL
- bool "SPL/FEL mode support"
- depends on SPL
- default n
-
config UART0_PORT_F
bool "UART0 on MicroSD breakout board"
- depends on SPL_FEL
default n
---help---
Repurpose the SD card slot for getting access to the UART0 serial
at the same time, the system can be only booted in the FEL mode.
Only enable this if you really know what you are doing.
-config FDTFILE
- string "Default fdtfile env setting for this board"
-
config OLD_SUNXI_KERNEL_COMPAT
boolean "Enable workarounds for booting old kernels"
default n
---help---
See MMC0_CD_PIN help text.
+config MMC1_PINS
+ string "Pins for mmc1"
+ default ""
+ ---help---
+ Set the pins used for mmc1, when applicable. This takes a string in the
+ format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
+
+config MMC2_PINS
+ string "Pins for mmc2"
+ default ""
+ ---help---
+ See MMC1_PINS help text.
+
+config MMC3_PINS
+ string "Pins for mmc3"
+ default ""
+ ---help---
+ See MMC1_PINS help text.
+
config MMC_SUNXI_SLOT_EXTRA
int "mmc extra slot number"
default -1
Set the Vbus enable pin for usb0 (otg). This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+config USB0_VBUS_DET
+ string "Vbus detect pin for usb0 (otg)"
+ default ""
+ ---help---
+ Set the Vbus detect pin for usb0 (otg). This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
+config USB0_ID_DET
+ string "ID detect pin for usb0 (otg)"
+ default ""
+ ---help---
+ Set the ID detect pin for usb0 (otg). This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
config USB1_VBUS_PIN
string "Vbus enable pin for usb1 (ehci0)"
default "PH6" if MACH_SUN4I || MACH_SUN7I
---help---
See USB1_VBUS_PIN help text.
+config I2C0_ENABLE
+ bool "Enable I2C/TWI controller 0"
+ default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+ default n if MACH_SUN6I || MACH_SUN8I
+ ---help---
+ This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
+ its clock and setting up the bus. This is especially useful on devices
+ with slaves connected to the bus or with pins exposed through e.g. an
+ expansion port/header.
+
+config I2C1_ENABLE
+ bool "Enable I2C/TWI controller 1"
+ default n
+ ---help---
+ See I2C0_ENABLE help text.
+
+config I2C2_ENABLE
+ bool "Enable I2C/TWI controller 2"
+ default n
+ ---help---
+ See I2C0_ENABLE help text.
+
+if MACH_SUN6I || MACH_SUN7I
+config I2C3_ENABLE
+ bool "Enable I2C/TWI controller 3"
+ default n
+ ---help---
+ See I2C0_ENABLE help text.
+endif
+
+if MACH_SUN7I
+config I2C4_ENABLE
+ bool "Enable I2C/TWI controller 4"
+ default n
+ ---help---
+ See I2C0_ENABLE help text.
+endif
+
+config AXP_GPIO
+ boolean "Enable support for gpio-s on axp PMICs"
+ default n
+ ---help---
+ Say Y here to enable support for the gpio pins of the axp PMIC ICs.
+
config VIDEO
boolean "Enable graphical uboot console on HDMI, LCD or VGA"
default y
LCD interface driving a VGA connector, such as found on the
Olimex A13 boards.
+config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
+ boolean "Force sync active high for VGA via LCD controller support"
+ depends on VIDEO_VGA_VIA_LCD
+ default n
+ ---help---
+ Say Y here if you've a board which uses opendrain drivers for the vga
+ hsync and vsync signals. Opendrain drivers cannot generate steep enough
+ positive edges for a stable video output, so on boards with opendrain
+ drivers the sync signals must always be active high.
+
config VIDEO_VGA_EXTERNAL_DAC_EN
string "LCD panel power enable pin"
depends on VIDEO_VGA_VIA_LCD
Set the enable pin for the external VGA DAC. This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+config VIDEO_COMPOSITE
+ boolean "Composite video output support"
+ depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
+ default n
+ ---help---
+ Say Y here to add support for outputting composite video.
+
config VIDEO_LCD_MODE
string "LCD panel timing details"
depends on VIDEO
LCD panel timing details string, leave empty if there is no LCD panel.
This is in drivers/video/videomodes.c: video_get_params() format, e.g.
x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
+ Also see: http://linux-sunxi.org/LCD
config VIDEO_LCD_DCLK_PHASE
int "LCD panel display clock phase"
Set the power enable pin for the LCD panel. This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+config VIDEO_LCD_RESET
+ string "LCD panel reset pin"
+ depends on VIDEO
+ default ""
+ ---help---
+ Set the reset pin for the LCD panel. This takes a string in the format
+ understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
config VIDEO_LCD_BL_EN
string "LCD panel backlight enable pin"
depends on VIDEO
Set the backlight pwm pin for the LCD panel. This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+config VIDEO_LCD_BL_PWM_ACTIVE_LOW
+ bool "LCD panel backlight pwm is inverted"
+ depends on VIDEO
+ default y
+ ---help---
+ Set this if the backlight pwm output is active low.
+
+config VIDEO_LCD_PANEL_I2C
+ bool "LCD panel needs to be configured via i2c"
+ depends on VIDEO
+ default n
+ ---help---
+ Say y here if the LCD panel needs to be configured via i2c. This
+ will add a bitbang i2c controller using gpios to talk to the LCD.
+
+config VIDEO_LCD_PANEL_I2C_SDA
+ string "LCD panel i2c interface SDA pin"
+ depends on VIDEO_LCD_PANEL_I2C
+ default "PG12"
+ ---help---
+ Set the SDA pin for the LCD i2c interface. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
+config VIDEO_LCD_PANEL_I2C_SCL
+ string "LCD panel i2c interface SCL pin"
+ depends on VIDEO_LCD_PANEL_I2C
+ default "PG10"
+ ---help---
+ Set the SCL pin for the LCD i2c interface. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+
# Note only one of these may be selected at a time! But hidden choices are
# not supported by Kconfig
select VIDEO_LCD_SSD2828
select VIDEO_LCD_IF_PARALLEL
---help---
- 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
+ 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
-endchoice
+config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
+ bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
+ select VIDEO_LCD_ANX9804
+ select VIDEO_LCD_IF_PARALLEL
+ select VIDEO_LCD_PANEL_I2C
+ ---help---
+ Select this for eDP LCD panels with 4 lanes running at 1.62G,
+ connected via an ANX9804 bridge chip.
+config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
+ bool "Hitachi tx18d42vm LCD panel"
+ select VIDEO_LCD_HITACHI_TX18D42VM
+ select VIDEO_LCD_IF_LVDS
+ ---help---
+ 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
-config USB_MUSB_SUNXI
- bool "Enable sunxi OTG / DRC USB controller in host mode"
- default n
+config VIDEO_LCD_TL059WV5C0
+ bool "tl059wv5c0 LCD panel"
+ select VIDEO_LCD_PANEL_I2C
+ select VIDEO_LCD_IF_PARALLEL
---help---
- Say y here to enable support for the sunxi OTG / DRC USB controller
- used on almost all sunxi boards. Note currently u-boot can only have
- one usb host controller enabled at a time, so enabling this on boards
- which also use the ehci host controller will result in build errors.
+ 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
+ Aigo M60/M608/M606 tablets.
-config USB_KEYBOARD
- boolean "Enable USB keyboard support"
- default y
+endchoice
+
+
+config GMAC_TX_DELAY
+ int "GMAC Transmit Clock Delay Chain"
+ default 0
---help---
- Say Y here to add support for using a USB keyboard (typically used
- in combination with a graphical console).
+ Set the GMAC Transmit Clock Delay Chain value.
endif
projects / karo-tx-uboot.git / blobdiff