*/
#include <common.h>
#include <palmas.h>
+#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mmc_host_def.h>
#include <tca642x.h>
+#include <usb.h>
+#include <linux/usb/gadget.h>
+#include <dwc3-uboot.h>
+#include <dwc3-omap-uboot.h>
+#include <ti-usb-phy-uboot.h>
#include "mux_data.h"
-#ifdef CONFIG_USB_EHCI
+#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
+#include <sata.h>
#include <usb.h>
#include <asm/gpio.h>
#include <asm/arch/clock.h>
#include <asm/arch/ehci.h>
#include <asm/ehci-omap.h>
+#include <asm/arch/sata.h>
#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
#define DIE_ID_REG_OFFSET 0x200
.configuration_reg = 0x40 },
};
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device usb_otg_ss = {
+ .maximum_speed = USB_SPEED_SUPER,
+ .base = OMAP5XX_USB_OTG_SS_BASE,
+ .tx_fifo_resize = false,
+ .index = 0,
+};
+
+static struct dwc3_omap_device usb_otg_ss_glue = {
+ .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
+ .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
+ .index = 0,
+};
+
+static struct ti_usb_phy_device usb_phy_device = {
+ .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
+ .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
+ .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
+ .index = 0,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ if (index) {
+ printf("Invalid Controller Index\n");
+ return -EINVAL;
+ }
+
+ if (init == USB_INIT_DEVICE) {
+ usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
+ usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
+ } else {
+ usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
+ usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
+ }
+
+ enable_usb_clocks(index);
+ ti_usb_phy_uboot_init(&usb_phy_device);
+ dwc3_omap_uboot_init(&usb_otg_ss_glue);
+ dwc3_uboot_init(&usb_otg_ss);
+
+ return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ if (index) {
+ printf("Invalid Controller Index\n");
+ return -EINVAL;
+ }
+
+ ti_usb_phy_uboot_exit(index);
+ dwc3_uboot_exit(index);
+ dwc3_omap_uboot_exit(index);
+ disable_usb_clocks(index);
+
+ return 0;
+}
+
+int usb_gadget_handle_interrupts(int index)
+{
+ u32 status;
+
+ status = dwc3_omap_uboot_interrupt_status(index);
+ if (status)
+ dwc3_uboot_handle_interrupt(index);
+
+ return 0;
+}
+#endif
+
/**
* @brief board_init
*
return 0;
}
+#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
+static void enable_host_clocks(void)
+{
+ int auxclk;
+ int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
+ OPTFCLKEN_HSIC480M_P3_CLK |
+ OPTFCLKEN_HSIC60M_P2_CLK |
+ OPTFCLKEN_HSIC480M_P2_CLK |
+ OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
+
+ /* Enable port 2 and 3 clocks*/
+ setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
+
+ /* Enable port 2 and 3 usb host ports tll clocks*/
+ setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+ (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
+#ifdef CONFIG_USB_XHCI_OMAP
+ /* Enable the USB OTG Super speed clocks */
+ setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
+ (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
+#endif
+
+ auxclk = readl((*prcm)->scrm_auxclk1);
+ /* Request auxilary clock */
+ auxclk |= AUXCLK_ENABLE_MASK;
+ writel(auxclk, (*prcm)->scrm_auxclk1);
+}
+#endif
+
/**
* @brief misc_init_r - Configure EVM board specific configurations
* such as power configurations, ethernet initialization as phase2 of
*/
int misc_init_r(void)
{
+ int reg;
+ u32 id[4];
+
#ifdef CONFIG_PALMAS_POWER
palmas_init_settings();
#endif
+
+ reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
+
+ id[0] = readl(reg);
+ id[1] = readl(reg + 0x8);
+ id[2] = readl(reg + 0xC);
+ id[3] = readl(reg + 0x10);
+ usb_fake_mac_from_die_id(id);
+
return 0;
}
sizeof(struct pad_conf_entry));
}
-void set_muxconf_regs_non_essential(void)
-{
- do_set_mux((*ctrl)->control_padconf_core_base,
- core_padconf_array_non_essential,
- sizeof(core_padconf_array_non_essential) /
- sizeof(struct pad_conf_entry));
-
- do_set_mux((*ctrl)->control_padconf_wkup_base,
- wkup_padconf_array_non_essential,
- sizeof(wkup_padconf_array_non_essential) /
- sizeof(struct pad_conf_entry));
-}
-
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
int board_mmc_init(bd_t *bis)
{
.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
};
-static void enable_host_clocks(void)
-{
- int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
- OPTFCLKEN_HSIC480M_P3_CLK |
- OPTFCLKEN_HSIC60M_P2_CLK |
- OPTFCLKEN_HSIC480M_P2_CLK |
- OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
-
- /* Enable port 2 and 3 clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
-
- /* Enable port 2 and 3 usb host ports tll clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
- (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
-}
-
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
- int auxclk;
- int reg;
- uint8_t device_mac[6];
enable_host_clocks();
- if (!getenv("usbethaddr")) {
- reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
-
- /*
- * create a fake MAC address from the processor ID code.
- * first byte is 0x02 to signify locally administered.
- */
- device_mac[0] = 0x02;
- device_mac[1] = readl(reg + 0x10) & 0xff;
- device_mac[2] = readl(reg + 0xC) & 0xff;
- device_mac[3] = readl(reg + 0x8) & 0xff;
- device_mac[4] = readl(reg) & 0xff;
- device_mac[5] = (readl(reg) >> 8) & 0xff;
-
- eth_setenv_enetaddr("usbethaddr", device_mac);
- }
-
- auxclk = readl((*prcm)->scrm_auxclk1);
- /* Request auxilary clock */
- auxclk |= AUXCLK_ENABLE_MASK;
- writel(auxclk, (*prcm)->scrm_auxclk1);
-
- ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
if (ret < 0) {
puts("Failed to initialize ehci\n");
return ret;
}
}
#endif
+
+#ifdef CONFIG_USB_XHCI_OMAP
+/**
+ * @brief board_usb_init - Configure EVM board specific configurations
+ * for the LDO's and clocks for the USB blocks.
+ *
+ * @return 0
+ */
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int ret;
+#ifdef CONFIG_PALMAS_USB_SS_PWR
+ ret = palmas_enable_ss_ldo();
+#endif
+
+ enable_host_clocks();
+
+ return 0;
+}
+#endif
projects / karo-tx-uboot.git / blobdiff