ARM: AM33xx: Cleanup clocks layer

[karo-tx-uboot.git] / board / ti / ti814x / evm.c

diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 7adb52405c13ab41391b97ab5ce612bffe5b96c3..bd708bb367399e99806cce30077ebed85eb4a540 100644 (file)
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -5,15 +5,7 @@
  *
  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -37,49 +29,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_SPL_BUILD
 static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 #endif
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
 /* UART Defines */
 #ifdef CONFIG_SPL_BUILD
-#define UART_RESET             (0x1 << 1)
-#define UART_CLK_RUNNING_MASK  0x1
-#define UART_SMART_IDLE_EN     (0x1 << 0x3)
-
-static void rtc32k_enable(void)
-{
-       struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
-
-       /*
-        * Unlock the RTC's registers.  For more details please see the
-        * RTC_SS section of the TRM.  In order to unlock we need to
-        * write these specific values (keys) in this order.
-        */
-       writel(0x83e70b13, &rtc->kick0r);
-       writel(0x95a4f1e0, &rtc->kick1r);
-
-       /* Enable the RTC 32K OSC by setting bits 3 and 6. */
-       writel((1 << 3) | (1 << 6), &rtc->osc);
-}
-
 static void uart_enable(void)
 {
-       u32 regVal;
-
        /* UART softreset */
-       regVal = readl(&uart_base->uartsyscfg);
-       regVal |= UART_RESET;
-       writel(regVal, &uart_base->uartsyscfg);
-       while ((readl(&uart_base->uartsyssts) &
-               UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
-               ;
-
-       /* Disable smart idle */
-       regVal = readl(&uart_base->uartsyscfg);
-       regVal |= UART_SMART_IDLE_EN;
-       writel(regVal, &uart_base->uartsyscfg);
+       uart_soft_reset();
 }
 
 static void wdt_disable(void)
@@ -149,6 +108,15 @@ static const struct ddr_data evm_ddr2_data = {
 void s_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
+       /*
+        * Save the boot parameters passed from romcode.
+        * We cannot delay the saving further than this,
+        * to prevent overwrites.
+        */
+#ifdef CONFIG_SPL_BUILD
+       save_omap_boot_params();
+#endif
+
        /* WDT1 is already running when the bootloader gets control
         * Disable it to avoid "random" resets
         */
@@ -157,11 +125,7 @@ void s_init(void)
        /* Enable timer */
        timer_init();
 
-       /* Setup the PLLs and the clocks for the peripherals */
-       pll_init();
-
-       /* Enable RTC32K clock */
-       rtc32k_enable();
+       setup_clocks_for_console();
 
        /* Set UART pins */
        enable_uart0_pin_mux();
@@ -179,6 +143,12 @@ void s_init(void)
 
        preloader_console_init();
 
+       /* Setup the PLLs and the clocks for the peripherals */
+       prcm_init();
+
+       /* Enable RTC32K clock */
+       rtc32k_enable();
+
        config_dmm(&evm_lisa_map_regs);
 
        config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data,
@@ -239,6 +209,7 @@ static struct cpsw_platform_data cpsw_data = {
        .ale_entries            = 1024,
        .host_port_reg_ofs      = 0x28,
        .hw_stats_reg_ofs       = 0x400,
+       .bd_ram_ofs             = 0x2000,
        .mac_control            = (1 << 5),
        .control                = cpsw_control,
        .host_port_num          = 0,