#include <asm/arch/mem.h>
#include <asm/mach-types.h>
#include "devkit8000.h"
+#include <asm/gpio.h>
#ifdef CONFIG_DRIVER_DM9000
#include <net.h>
#include <netdev.h>
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
- omap_mmc_init(0);
- return 0;
+ return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
gpmc_dm9000_config();
}
+/*
+ * devkit8000 specific implementation of spl_start_uboot()
+ *
+ * RETURN
+ * 0 if the button is not pressed
+ * 1 if the button is pressed
+ */
+int spl_start_uboot(void)
+{
+ int val = 0;
+ if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
+ gpio_direction_input(SPL_OS_BOOT_KEY);
+ val = gpio_get_value(SPL_OS_BOOT_KEY);
+ gpio_free(SPL_OS_BOOT_KEY);
+ }
+ return !val;
+}
#endif
/*
* provides the timing values back to the function that configures
* the memory. We have either one or two banks of 128MB DDR.
*/
-void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
- u32 *mr)
+void get_board_mem_timings(struct board_sdrc_timings *timings)
{
/* General SDRC config */
- *mcfg = MICRON_V_MCFG_165(128 << 20);
- *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+ timings->mcfg = MICRON_V_MCFG_165(128 << 20);
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
/* AC timings */
- *ctrla = MICRON_V_ACTIMA_165;
- *ctrlb = MICRON_V_ACTIMB_165;
+ timings->ctrla = MICRON_V_ACTIMA_165;
+ timings->ctrlb = MICRON_V_ACTIMB_165;
- *mr = MICRON_V_MR_165;
+ timings->mr = MICRON_V_MR_165;
}