* (C) Copyright 2000
* Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#if defined(CONFIG_8xx)
#include <mpc8xx.h>
-#elif defined (CONFIG_405GP) || defined(CONFIG_405EP)
-#include <asm/processor.h>
+#elif defined (CONFIG_4xx)
+extern void ppc4xx_reginfo(void);
#elif defined (CONFIG_5xx)
#include <mpc5xx.h>
#elif defined (CONFIG_MPC5200)
#include <mpc5xxx.h>
#elif defined (CONFIG_MPC86xx)
extern void mpc86xx_reginfo(void);
+#elif defined(CONFIG_MPC85xx)
+extern void mpc85xx_reginfo(void);
#endif
-int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
{
#if defined(CONFIG_8xx)
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
* May be some CPM info here?
*/
-#elif defined (CONFIG_405GP)
- printf ("\n405GP registers; MSR=%08x\n",mfmsr());
- printf ("\nUniversal Interrupt Controller Regs\n"
- "uicsr uicer uiccr uicpr uictr uicmsr uicvr uicvcr"
- "\n"
- "%08x %08x %08x %08x %08x %08x %08x %08x\n",
- mfdcr(uicsr),
- mfdcr(uicer),
- mfdcr(uiccr),
- mfdcr(uicpr),
- mfdcr(uictr),
- mfdcr(uicmsr),
- mfdcr(uicvr),
- mfdcr(uicvcr));
-
- puts ("\nMemory (SDRAM) Configuration\n"
- "besra besrsa besrb besrsb bear mcopt1 rtr pmit\n");
-
- mtdcr(SDRAM0_CFGADDR,mem_besra); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_besrsa); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_besrb); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_besrsb); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_bear); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mcopt1); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_rtr); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_pmit); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
-
- puts ("\n"
- "mb0cf mb1cf mb2cf mb3cf sdtr1 ecccf eccerr\n");
- mtdcr(SDRAM0_CFGADDR,mem_mb0cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mb1cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mb2cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mb3cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_sdtr1); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_ecccf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_eccerr); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
-
- printf ("\n\n"
- "DMA Channels\n"
- "DMASR DMASGC DMAADR\n"
- "%08x %08x %08x\n"
- "dmacr_0 dmact_0 dmada_0 dmasa_0 dmasb_0\n"
- "%08x %08x %08x %08x %08x\n"
- "dmacr_1 dmact_1 dmada_1 dmasa_1 dmasb_1\n"
- "%08x %08x %08x %08x %08x\n",
- mfdcr(DMASR), mfdcr(DMASGC),mfdcr(DMAADR),
- mfdcr(DMACR0), mfdcr(DMACT0),mfdcr(DMADA0), mfdcr(DMASA0), mfdcr(DMASB0),
- mfdcr(DMACR1), mfdcr(DMACT1),mfdcr(DMADA1), mfdcr(DMASA1), mfdcr(DMASB1));
-
- printf (
- "dmacr_2 dmact_2 dmada_2 dmasa_2 dmasb_2\n" "%08x %08x %08x %08x %08x\n"
- "dmacr_3 dmact_3 dmada_3 dmasa_3 dmasb_3\n" "%08x %08x %08x %08x %08x\n",
- mfdcr(DMACR2), mfdcr(DMACT2),mfdcr(DMADA2), mfdcr(DMASA2), mfdcr(DMASB2),
- mfdcr(DMACR3), mfdcr(DMACT3),mfdcr(DMADA3), mfdcr(DMASA3), mfdcr(DMASB3) );
-
- puts ("\n"
- "External Bus\n"
- "PBEAR PBESR0 PBESR1 EBC0_CFG\n");
- mtdcr(EBC0_CFGADDR,PBEAR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PBESR0); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PBESR1); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,EBC0_CFG); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n"
- "PB0CR PB0AP PB1CR PB1AP PB2CR PB2AP PB3CR PB3AP\n");
- mtdcr(EBC0_CFGADDR,PB0CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB0AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB1CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB1AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB2CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB2AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB3CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB3AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n"
- "PB4CR PB4AP PB5CR bp5ap PB6CR PB6AP PB7CR PB7AP\n");
- mtdcr(EBC0_CFGADDR,PB4CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB4AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB5CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB5AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB6CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB6AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB7CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB7AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n\n");
-
-#elif defined(CONFIG_405EP)
- printf ("\n405EP registers; MSR=%08x\n",mfmsr());
- printf ("\nUniversal Interrupt Controller Regs\n"
- "uicsr uicer uiccr uicpr uictr uicmsr uicvr uicvcr"
- "\n"
- "%08x %08x %08x %08x %08x %08x %08x %08x\n",
- mfdcr(uicsr),
- mfdcr(uicer),
- mfdcr(uiccr),
- mfdcr(uicpr),
- mfdcr(uictr),
- mfdcr(uicmsr),
- mfdcr(uicvr),
- mfdcr(uicvcr));
-
- puts ("\nMemory (SDRAM) Configuration\n"
- "mcopt1 rtr pmit mb0cf mb1cf sdtr1\n");
-
- mtdcr(SDRAM0_CFGADDR,mem_mcopt1); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_rtr); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_pmit); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mb0cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_mb1cf); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
- mtdcr(SDRAM0_CFGADDR,mem_sdtr1); printf ("%08x ", mfdcr(SDRAM0_CFGDATA));
-
- printf ("\n\n"
- "DMA Channels\n"
- "DMASR DMASGC DMAADR\n" "%08x %08x %08x\n"
- "dmacr_0 dmact_0 dmada_0 dmasa_0 dmasb_0\n" "%08x %08x %08x %08x %08x\n"
- "dmacr_1 dmact_1 dmada_1 dmasa_1 dmasb_1\n" "%08x %08x %08x %08x %08x\n",
- mfdcr(DMASR), mfdcr(DMASGC),mfdcr(DMAADR),
- mfdcr(DMACR0), mfdcr(DMACT0),mfdcr(DMADA0), mfdcr(DMASA0), mfdcr(DMASB0),
- mfdcr(DMACR1), mfdcr(DMACT1),mfdcr(DMADA1), mfdcr(DMASA1), mfdcr(DMASB1));
-
- printf (
- "dmacr_2 dmact_2 dmada_2 dmasa_2 dmasb_2\n" "%08x %08x %08x %08x %08x\n"
- "dmacr_3 dmact_3 dmada_3 dmasa_3 dmasb_3\n" "%08x %08x %08x %08x %08x\n",
- mfdcr(DMACR2), mfdcr(DMACT2),mfdcr(DMADA2), mfdcr(DMASA2), mfdcr(DMASB2),
- mfdcr(DMACR3), mfdcr(DMACT3),mfdcr(DMADA3), mfdcr(DMASA3), mfdcr(DMASB3) );
-
- puts ("\n"
- "External Bus\n"
- "PBEAR PBESR0 PBESR1 EBC0_CFG\n");
- mtdcr(EBC0_CFGADDR,PBEAR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PBESR0); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PBESR1); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,EBC0_CFG); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n"
- "PB0CR PB0AP PB1CR PB1AP PB2CR PB2AP PB3CR PB3AP\n");
- mtdcr(EBC0_CFGADDR,PB0CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB0AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB1CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB1AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB2CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB2AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB3CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB3AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n"
- "PB4CR PB4AP\n");
- mtdcr(EBC0_CFGADDR,PB4CR); printf ("%08x ", mfdcr(EBC0_CFGDATA));
- mtdcr(EBC0_CFGADDR,PB4AP); printf ("%08x ", mfdcr(EBC0_CFGDATA));
-
- puts ("\n\n");
+#elif defined (CONFIG_4xx)
+ ppc4xx_reginfo();
#elif defined(CONFIG_5xx)
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
#elif defined(CONFIG_MPC86xx)
mpc86xx_reginfo();
+#elif defined(CONFIG_MPC85xx)
+ mpc85xx_reginfo();
+
#elif defined(CONFIG_BLACKFIN)
puts("\nSystem Configuration registers\n");
-
+#ifndef __ADSPBF60x__
puts("\nPLL Registers\n");
printf("\tPLL_DIV: 0x%04x PLL_CTL: 0x%04x\n",
bfin_read_PLL_DIV(), bfin_read_PLL_CTL());
printf("\tEBIU_SDSTAT: 0x%04x EBIU_SDGCTL: 0x%08x\n",
bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL());
# endif
-
+#else
+ puts("\nCGU Registers\n");
+ printf("\tCGU_DIV: 0x%08x CGU_CTL: 0x%08x\n",
+ bfin_read_CGU_DIV(), bfin_read_CGU_CTL());
+ printf("\tCGU_STAT: 0x%08x CGU_LOCKCNT: 0x%08x\n",
+ bfin_read_CGU_STAT(), bfin_read_CGU_CLKOUTSEL());
+
+ puts("\nSMC DDR Registers\n");
+ printf("\tDDR_CFG: 0x%08x DDR_TR0: 0x%08x\n",
+ bfin_read_DMC0_CFG(), bfin_read_DMC0_TR0());
+ printf("\tDDR_TR1: 0x%08x DDR_TR2: 0x%08x\n",
+ bfin_read_DMC0_TR1(), bfin_read_DMC0_TR2());
+ printf("\tDDR_MR: 0x%08x DDR_EMR1: 0x%08x\n",
+ bfin_read_DMC0_MR(), bfin_read_DMC0_EMR1());
+ printf("\tDDR_CTL: 0x%08x DDR_STAT: 0x%08x\n",
+ bfin_read_DMC0_CTL(), bfin_read_DMC0_STAT());
+ printf("\tDDR_DLLCTL:0x%08x\n", bfin_read_DMC0_DLLCTL());
+#endif
#endif /* CONFIG_BLACKFIN */
return 0;
projects / karo-tx-uboot.git / blobdiff