Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / cpu / mpc5xxx / cpu.c

diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index f6258c7be60b9f00d4d546be36ed9c3f5e06174e..edfb8282b7dea266d8253395d6795c54252e20de 100644 (file)
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2010
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -40,6 +40,10 @@
 #include <fdt_support.h>
 #endif
 
+#if defined(CONFIG_OF_IDE_FIXUP)
+#include <ide.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int checkcpu (void)
@@ -137,6 +141,23 @@ void ft_cpu_setup(void *blob, bd_t *bd)
        do_fixup_by_path(blob, eth_path, "mac-address", enetaddr, 6, 0);
        do_fixup_by_path(blob, eth_path, "local-mac-address", enetaddr, 6, 0);
 #endif
+#if defined(CONFIG_OF_IDE_FIXUP)
+       if (!ide_device_present(0)) {
+               /* NO CF card detected -> delete ata node in DTS */
+               int nodeoffset = 0;
+               char nodename[] = "/soc5200@f0000000/ata@3a00";
+
+               nodeoffset = fdt_path_offset(blob, nodename);
+               if (nodeoffset >= 0) {
+                       fdt_del_node(blob, nodeoffset);
+               } else {
+                       printf("%s: cannot find %s node err:%s\n",
+                               __func__, nodename, fdt_strerror(nodeoffset));
+               }
+       }
+
+#endif
+       fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 }
 #endif
 
@@ -171,3 +192,21 @@ int cpu_eth_init(bd_t *bis)
        return mpc5xxx_fec_initialize(bis);
 }
 #endif
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset(void)
+{
+       int re_enable = disable_interrupts();
+       reset_5xxx_watchdog();
+       if (re_enable) enable_interrupts();
+}
+
+void reset_5xxx_watchdog(void)
+{
+       volatile struct mpc5xxx_gpt *gpt0 =
+               (struct mpc5xxx_gpt *) MPC5XXX_GPT;
+
+       /* Trigger TIMER_0 by writing A5 to OCPW */
+       clrsetbits_be32(&gpt0->emsr, 0xff000000, 0xa5000000);
+}
+#endif /* CONFIG_WATCHDOG */