*/
#include <config.h>
#include <mpc86xx.h>
+#include <timestamp.h>
#include <version.h>
#include <ppc_asm.tmpl>
/*
* Set up GOT: Global Offset Table
*
- * Use r14 to access the GOT
+ * Use r12 to access the GOT
*/
START_GOT
GOT_ENTRY(_GOT2_TABLE_)
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
mfspr r5,DSISR
stw r5,_DSISR(r21)
addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_Alignment:
- .long AlignmentException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
/* Program check exception */
. = 0x700
ProgramCheck:
EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_ProgramCheck:
- .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
+ MSR_KERNEL, COPY_EE)
STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
sync
#endif
-#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
- /* setup ccsrbar now while we're in real mode */
- bl setup_ccsrbar
-#endif
-
/*
* Calculate absolute address in FLASH and jump there
*------------------------------------------------------*/
- lis r3, CONFIG_SYS_MONITOR_BASE@h
- ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
+ lis r3, CONFIG_SYS_MONITOR_BASE_EARLY@h
+ ori r3, r3, CONFIG_SYS_MONITOR_BASE_EARLY@l
addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
mtlr r3
blr
*/
/* enable address translation */
- bl enable_addr_trans
- sync
+ mfmsr r5
+ ori r5, r5, (MSR_IR | MSR_DR)
+ lis r3,addr_trans_enabled@h
+ ori r3, r3, addr_trans_enabled@l
+ mtspr SPRN_SRR0,r3
+ mtspr SPRN_SRR1,r5
+ rfi
+addr_trans_enabled:
/* enable and invalidate the data cache */
/* bl l1dcache_enable */
bl dcache_enable
sync
#endif
+#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+ bl setup_ccsrbar
+#endif
+
/* set up the stack pointer in our newly created
* cache-ram (r1) */
lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
GET_GOT /* initialize GOT access */
- /* setup the rest of the bats */
- bl setup_bats
- sync
-
-
/* run low-level CPU init code (from Flash) */
bl cpu_init_f
sync
#ifdef RUN_DIAG
/* Load PX_AUX register address in r4 */
- lis r4, 0xf810
+ lis r4, PIXIS_BASE@h
ori r4, r4, 0x6
/* Load contents of PX_AUX in r3 bits 24 to 31*/
lbz r3, 0(r4)
isync
/* IBAT 6 */
- lis r4, CONFIG_SYS_IBAT6L@h
- ori r4, r4, CONFIG_SYS_IBAT6L@l
- lis r3, CONFIG_SYS_IBAT6U@h
- ori r3, r3, CONFIG_SYS_IBAT6U@l
+ lis r4, CONFIG_SYS_IBAT6L_EARLY@h
+ ori r4, r4, CONFIG_SYS_IBAT6L_EARLY@l
+ lis r3, CONFIG_SYS_IBAT6U_EARLY@h
+ ori r3, r3, CONFIG_SYS_IBAT6U_EARLY@l
mtspr IBAT6L, r4
mtspr IBAT6U, r3
isync
/* DBAT 6 */
- lis r4, CONFIG_SYS_DBAT6L@h
- ori r4, r4, CONFIG_SYS_DBAT6L@l
- lis r3, CONFIG_SYS_DBAT6U@h
- ori r3, r3, CONFIG_SYS_DBAT6U@l
+ lis r4, CONFIG_SYS_DBAT6L_EARLY@h
+ ori r4, r4, CONFIG_SYS_DBAT6L_EARLY@l
+ lis r3, CONFIG_SYS_DBAT6U_EARLY@h
+ ori r3, r3, CONFIG_SYS_DBAT6U_EARLY@l
mtspr DBAT6L, r4
mtspr DBAT6U, r3
isync
+
+#if(CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+ /* IBAT 7 */
+ lis r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@h
+ ori r4, r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@l
+ lis r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@h
+ ori r3, r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@l
+ mtspr IBAT7L, r4
+ mtspr IBAT7U, r3
+ isync
+
+ /* DBAT 7 */
+ lis r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@h
+ ori r4, r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@l
+ lis r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@h
+ ori r3, r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@l
+ mtspr DBAT7L, r4
+ mtspr DBAT7U, r3
+ isync
+#endif
blr
.globl clear_tlbs
blt tlblp
blr
- .globl enable_addr_trans
-enable_addr_trans:
- /* enable address translation */
- mfmsr r5
- ori r5, r5, (MSR_IR | MSR_DR)
- mtmsr r5
- isync
- blr
-
.globl disable_addr_trans
disable_addr_trans:
/* disable address translation */
mr r9, r4 /* Save copy of Global Data pointer */
mr r10, r5 /* Save copy of Destination Address */
+ GET_GOT
mr r3, r5 /* Destination Address */
lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
sub r15, r10, r4
/* First our own GOT */
- add r14, r14, r15
+ add r12, r12, r15
/* then the one used by the C code */
add r30, r30, r15
in_ram:
/*
- * Relocation Function, r14 point to got2+0x8000
+ * Relocation Function, r12 point to got2+0x8000
*
* Adjust got2 pointers, no need to check for 0, this code
* already puts a few entries in the table.
sub r11,r3,r11
addi r3,r3,-4
1: lwzu r0,4(r3)
+ cmpwi r0,0
+ beq- 2f
add r0,r0,r11
stw r0,0(r3)
- bdnz 1b
+2: bdnz 1b
/*
* Now adjust the fixups and the pointers to the fixups
* in case we need to move ourselves again.
*/
-2: li r0,__fixup_entries@sectoff@l
+ li r0,__fixup_entries@sectoff@l
lwz r3,GOT(_FIXUP_TABLE_)
cmpwi r0,0
mtctr r0
*/
.globl trap_init
trap_init:
+ mflr r4 /* save link register */
+ GET_GOT
lwz r7, GOT(_start)
lwz r8, GOT(_end_of_vectors)
cmplw 0, r7, r8
bgelr /* return if r7>=r8 - just in case */
-
- mflr r4 /* save link register */
1:
lwz r0, 0(r7)
stw r0, 0(r9)
mtlr r4 /* restore link register */
blr
- /*
- * Function: relocate entries for one exception vector
- */
-trap_reloc:
- lwz r0, 0(r7) /* hdlr ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 0(r7)
-
- lwz r0, 4(r7) /* int_return ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 4(r7)
-
- sync
- isync
-
- blr
-
.globl enable_ext_addr
enable_ext_addr:
mfspr r0, HID0
lis r4, CONFIG_SYS_CCSRBAR_DEFAULT@h
ori r4, r4, CONFIG_SYS_CCSRBAR_DEFAULT@l
- lis r5, CONFIG_SYS_CCSRBAR@h
- ori r5, r5, CONFIG_SYS_CCSRBAR@l
- srwi r6,r5,12
- stw r6, 0(r4)
+ lis r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@h
+ ori r5, r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
+ srwi r5,r5,12
+ li r6, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
+ rlwimi r5,r6,20,8,11
+ stw r5, 0(r4) /* Store physical value of CCSR */
isync
- lis r5, 0xffff
- ori r5,r5,0xf000
+ lis r5, TEXT_BASE@h
+ ori r5,r5,TEXT_BASE@l
lwz r5, 0(r5)
isync
+ /* Use VA of CCSR to do read */
lis r3, CONFIG_SYS_CCSRBAR@h
lwz r5, CONFIG_SYS_CCSRBAR@l(r3)
isync
blr
#endif
#endif
-
-
projects / karo-tx-uboot.git / blobdiff