fpga: xilinx: Simplify load/dump/info function handling

[karo-tx-uboot.git] / drivers / fpga / zynqpl.c

diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index b4d0e2278c9480a84efa7b11d6cedc99d65f2c39..dcd34951ad68f727ddb482ab2079c52c151ac227 100644 (file)
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -36,7 +36,7 @@
 #define CONFIG_SYS_FPGA_PROG_TIME      (CONFIG_SYS_HZ * 4) /* 4 s */
 #endif
 
-int zynq_info(xilinx_desc *desc)
+static int zynq_info(xilinx_desc *desc)
 {
        return FPGA_SUCCESS;
 }
@@ -152,8 +152,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
        return 0;
 }
 
-
-int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        unsigned long ts; /* Timestamp */
        u32 partialbit = 0;
@@ -358,7 +357,13 @@ int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
        return FPGA_SUCCESS;
 }
 
-int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        return FPGA_FAIL;
 }
+
+struct xilinx_fpga_op zynq_op = {
+       .load = zynq_load,
+       .dump = zynq_dump,
+       .info = zynq_info,
+};