static u16 wait_for_pin(void);
static void flush_fifo(void);
-static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
-
-static unsigned int bus_initialized[I2C_BUS_MAX];
-static unsigned int current_bus;
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static struct i2c __attribute__((section (".data"))) *i2c_base =
+ (struct i2c *)I2C_DEFAULT_BASE;
+static unsigned int __attribute__((section (".data"))) bus_initialized[I2C_BUS_MAX] =
+ { [0 ... (I2C_BUS_MAX-1)] = 0 };
+static unsigned int __attribute__((section (".data"))) current_bus = 0;
void i2c_init(int speed, int slaveadd)
{
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
- printf("Error : I2C initializing first phase clock\n");
+ puts("Error : I2C initializing first phase clock\n");
return;
}
hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
- printf("Error : I2C initializing second phase clock\n");
+ puts("Error : I2C initializing second phase clock\n");
return;
}
fssclh -= I2C_FASTSPEED_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
- printf("Error : I2C initializing clock\n");
+ puts("Error : I2C initializing clock\n");
return;
}
writew(I2C_CON_EN, &i2c_base->con);
while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
if (timeout <= 0) {
- printf("ERROR: Timeout in soft-reset\n");
+ puts("ERROR: Timeout in soft-reset\n");
return;
}
udelay(1000);
bus_initialized[current_bus] = 1;
}
-static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
+static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value)
{
int i2c_error = 0;
u16 status;
+ int i = 2 - alen;
+ u8 tmpbuf[2] = {(regoffset) >> 8, regoffset & 0xff};
+ u16 w;
/* wait until bus not busy */
wait_for_bb();
/* one byte only */
- writew(1, &i2c_base->cnt);
+ writew(alen, &i2c_base->cnt);
/* set slave address */
writew(devaddr, &i2c_base->sa);
/* no stop bit needed here */
goto read_exit;
}
if (status & I2C_STAT_XRDY) {
- /* Important: have to use byte access */
- writeb(regoffset, &i2c_base->data);
+ w = tmpbuf[i++];
+#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
+ w |= tmpbuf[i++] << 8;
+#endif
+ writew(w, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
}
if (status & I2C_STAT_ARDY) {
}
if (status & I2C_STAT_RRDY) {
#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
- defined(CONFIG_OMAP44XX)
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
*value = readb(&i2c_base->data);
#else
*value = readw(&i2c_base->data);
stat = readw(&i2c_base->stat);
if (stat == I2C_STAT_RRDY) {
#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
- defined(CONFIG_OMAP44XX)
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
readb(&i2c_base->data);
#else
readw(&i2c_base->data);
/* wait until bus not busy */
wait_for_bb();
- /* try to write one byte */
+ /* try to read one byte */
writew(1, &i2c_base->cnt);
/* set slave address */
writew(chip, &i2c_base->sa);
/* stop bit needed here */
- writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
- I2C_CON_STP, &i2c_base->con);
-
- status = wait_for_pin();
+ writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c_base->con);
- /* check for ACK (!NAK) */
- if (!(status & I2C_STAT_NACK))
- res = 0;
-
- /* abort transfer (force idle state) */
- writew(0, &i2c_base->con);
+ while (1) {
+ status = wait_for_pin();
+ if (status == 0 || status & I2C_STAT_AL) {
+ res = 1;
+ goto probe_exit;
+ }
+ if (status & I2C_STAT_NACK) {
+ res = 1;
+ writew(0xff, &i2c_base->stat);
+ writew (readw (&i2c_base->con) | I2C_CON_STP, &i2c_base->con);
+ wait_for_bb ();
+ break;
+ }
+ if (status & I2C_STAT_ARDY) {
+ writew(I2C_STAT_ARDY, &i2c_base->stat);
+ break;
+ }
+ if (status & I2C_STAT_RRDY) {
+ res = 0;
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
+ readb(&i2c_base->data);
+#else
+ readw(&i2c_base->data);
+#endif
+ writew(I2C_STAT_RRDY, &i2c_base->stat);
+ }
+ }
+probe_exit:
flush_fifo();
/* don't allow any more data in... we don't want it. */
writew(0, &i2c_base->cnt);
{
int i;
- if (alen > 1) {
+ if (alen > 2) {
printf("I2C read: addr len %d not supported\n", alen);
return 1;
}
- if (addr + len > 256) {
- printf("I2C read: address out of range\n");
+ if (addr + len > (1 << 16)) {
+ puts("I2C read: address out of range\n");
return 1;
}
for (i = 0; i < len; i++) {
- if (i2c_read_byte(chip, addr + i, &buffer[i])) {
- printf("I2C read: I/O error\n");
+ if (i2c_read_byte(chip, addr + i, alen, &buffer[i])) {
+ puts("I2C read: I/O error\n");
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 1;
}
int i;
u16 status;
int i2c_error = 0;
+ u16 w;
+ u8 tmpbuf[2] = {addr >> 8, addr & 0xff};
- if (alen > 1) {
+ if (alen > 2) {
printf("I2C write: addr len %d not supported\n", alen);
return 1;
}
- if (addr + len > 256) {
+ if (addr + len > (1 << 16)) {
printf("I2C write: address 0x%x + 0x%x out of range\n",
addr, len);
return 1;
writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
I2C_CON_STP, &i2c_base->con);
- /* Send address byte */
- status = wait_for_pin();
-
- if (status == 0 || status & I2C_STAT_NACK) {
- i2c_error = 1;
- printf("error waiting for i2c address ACK (status=0x%x)\n",
- status);
- goto write_exit;
- }
-
- if (status & I2C_STAT_XRDY) {
- writeb(addr & 0xFF, &i2c_base->data);
- writew(I2C_STAT_XRDY, &i2c_base->stat);
- } else {
- i2c_error = 1;
- printf("i2c bus not ready for transmit (status=0x%x)\n",
- status);
- goto write_exit;
- }
-
- /* address phase is over, now write data */
- for (i = 0; i < len; i++) {
+ /* Send address and data */
+ for (i = -alen; i < len; i++) {
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
}
if (status & I2C_STAT_XRDY) {
- writeb(buffer[i], &i2c_base->data);
+ w = (i < 0) ? tmpbuf[2+i] : buffer[i];
+#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
+ defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
+ w |= ((++i < 0) ? tmpbuf[2+i] : buffer[i]) << 8;
+#endif
+ writew(w, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
} else {
i2c_error = 1;
projects / karo-tx-uboot.git / blobdiff