#include <i2c.h>
#include <twl4030.h>
#include <twl6030.h>
-#include <twl6035.h>
+#include <palmas.h>
+#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#define SYSCTL_SRC (1 << 25)
#define SYSCTL_SRD (1 << 26)
+struct omap_hsmmc_data {
+ struct hsmmc *base_addr;
+ int cd_gpio;
+ int wp_gpio;
+};
+
/* If we fail after 1 second wait, something is really bad */
#define MAX_RETRY_MS 1000
static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size);
static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
unsigned int siz);
-static struct mmc hsmmc_dev[2];
+static struct mmc hsmmc_dev[3];
+static struct omap_hsmmc_data hsmmc_dev_data[3];
+
+#if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
+static int omap_mmc_setup_gpio_in(int gpio, const char *label)
+{
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (gpio_request(gpio, label) < 0)
+ return -1;
+
+ if (gpio_direction_input(gpio) < 0)
+ return -1;
+
+ return gpio;
+}
+
+static int omap_mmc_getcd(struct mmc *mmc)
+{
+ int cd_gpio = ((struct omap_hsmmc_data *)mmc->priv)->cd_gpio;
+ return gpio_get_value(cd_gpio);
+}
+
+static int omap_mmc_getwp(struct mmc *mmc)
+{
+ int wp_gpio = ((struct omap_hsmmc_data *)mmc->priv)->wp_gpio;
+ return gpio_get_value(wp_gpio);
+}
+#else
+static inline int omap_mmc_setup_gpio_in(int gpio, const char *label)
+{
+ return -1;
+}
+
+#define omap_mmc_getcd NULL
+#define omap_mmc_getwp NULL
+#endif
#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER)
static void omap4_vmmc_pbias_config(struct mmc *mmc)
{
u32 value = 0;
- struct omap_sys_ctrl_regs *const ctrl =
- (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
-
- value = readl(&ctrl->control_pbiaslite);
+ value = readl((*ctrl)->control_pbiaslite);
value &= ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ);
- writel(value, &ctrl->control_pbiaslite);
+ writel(value, (*ctrl)->control_pbiaslite);
/* set VMMC to 3V */
twl6030_power_mmc_init();
- value = readl(&ctrl->control_pbiaslite);
+ value = readl((*ctrl)->control_pbiaslite);
value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ;
- writel(value, &ctrl->control_pbiaslite);
+ writel(value, (*ctrl)->control_pbiaslite);
}
#endif
-#if defined(CONFIG_OMAP54XX) && defined(CONFIG_TWL6035_POWER)
+#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER)
static void omap5_pbias_config(struct mmc *mmc)
{
u32 value = 0;
- struct omap_sys_ctrl_regs *const ctrl =
- (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
-
- value = readl(&ctrl->control_pbias);
- value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
- value |= SDCARD_BIAS_HIZ_MODE;
- writel(value, &ctrl->control_pbias);
-
- twl6035_mmc1_poweron_ldo();
-
- value = readl(&ctrl->control_pbias);
- value &= ~SDCARD_BIAS_HIZ_MODE;
- value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ;
- writel(value, &ctrl->control_pbias);
-
- value = readl(&ctrl->control_pbias);
- if (value & (1 << 23)) {
- value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
- value |= SDCARD_BIAS_HIZ_MODE;
- writel(value, &ctrl->control_pbias);
- }
+
+ value = readl((*ctrl)->control_pbias);
+ value &= ~SDCARD_PWRDNZ;
+ writel(value, (*ctrl)->control_pbias);
+ udelay(10); /* wait 10 us */
+ value &= ~SDCARD_BIAS_PWRDNZ;
+ writel(value, (*ctrl)->control_pbias);
+
+ palmas_mmc1_poweron_ldo();
+
+ value = readl((*ctrl)->control_pbias);
+ value |= SDCARD_BIAS_PWRDNZ;
+ writel(value, (*ctrl)->control_pbias);
+ udelay(150); /* wait 150 us */
+ value |= SDCARD_PWRDNZ;
+ writel(value, (*ctrl)->control_pbias);
+ udelay(150); /* wait 150 us */
}
#endif
-unsigned char mmc_board_init(struct mmc *mmc)
+static void mmc_board_init(struct mmc *mmc)
{
#if defined(CONFIG_OMAP34XX)
t2_t *t2_base = (t2_t *)T2_BASE;
if (mmc->block_dev.dev == 0)
omap4_vmmc_pbias_config(mmc);
#endif
-#if defined(CONFIG_OMAP54XX) && defined(CONFIG_TWL6035_POWER)
+#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER)
if (mmc->block_dev.dev == 0)
omap5_pbias_config(mmc);
#endif
-
- return 0;
}
void mmc_init_stream(struct hsmmc *mmc_base)
writel(MMC_CMD0, &mmc_base->cmd);
start = get_timer(0);
while (!(readl(&mmc_base->stat) & CC_MASK)) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for cc!\n", __func__);
- return;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
}
- writel(CC_MASK, &mmc_base->stat)
- ;
- writel(MMC_CMD0, &mmc_base->cmd)
- ;
+ if (!(readl(&mmc_base->stat) & CC_MASK)) {
+ printf("%s: timeout waiting for cc!\n", __func__);
+ return;
+ }
+
+ writel(CC_MASK, &mmc_base->stat);
+ writel(MMC_CMD0, &mmc_base->cmd);
+
start = get_timer(0);
while (!(readl(&mmc_base->stat) & CC_MASK)) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for cc2!\n", __func__);
- return;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if (!(readl(&mmc_base->stat) & CC_MASK)) {
+ printf("%s: timeout waiting for cc2!\n", __func__);
+ return;
}
writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
}
-
static int mmc_init_setup(struct mmc *mmc)
{
- struct hsmmc *mmc_base = (struct hsmmc *)mmc->priv;
+ struct omap_hsmmc_data *priv_data = mmc->priv;
+ struct hsmmc *mmc_base = priv_data->base_addr;
unsigned int reg_val;
unsigned int dsor;
ulong start;
&mmc_base->sysconfig);
start = get_timer(0);
while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for cc2!\n", __func__);
- return TIMEOUT;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) {
+ printf("%s: timeout %08x waiting for softreset done!\n", __func__,
+ readl(&mmc_base->sysstatus));
+ return TIMEOUT;
}
writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl);
start = get_timer(0);
- while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for softresetall!\n",
- __func__);
- return TIMEOUT;
- }
+ while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0) {
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0) {
+ printf("%s: timeout waiting for softresetall!\n", __func__);
+ return TIMEOUT;
}
writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
(dsor << CLKD_OFFSET) | ICE_OSCILLATE);
start = get_timer(0);
while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for ics!\n", __func__);
- return TIMEOUT;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
+ printf("%s: timeout waiting for ics!\n", __func__);
+ return TIMEOUT;
}
writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
start = get_timer(0);
while ((readl(&mmc_base->sysctl) & bit) != 0) {
- if (get_timer(0) - start > MAX_RETRY_MS) {
- printf("%s: timedout waiting for sysctl %x to clear\n",
- __func__, bit);
- return;
- }
+ if (get_timer(0) - start > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->sysctl) & bit) != 0) {
+ printf("%s: timedout waiting for sysctl %x to clear\n", __func__, bit);
+ return;
}
}
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct hsmmc *mmc_base = mmc->priv;
+ struct omap_hsmmc_data *priv_data = mmc->priv;
+ struct hsmmc *mmc_base = priv_data->base_addr;
unsigned int flags, mmc_stat;
ulong start;
start = get_timer(0);
while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting on cmd inhibit to clear\n",
- __func__);
- return TIMEOUT;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
+ printf("%s: timeout waiting on cmd inhibit to clear\n", __func__);
+ return TIMEOUT;
}
writel(0xFFFFFFFF, &mmc_base->stat);
start = get_timer(0);
while (readl(&mmc_base->stat)) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for stat!\n", __func__);
- return TIMEOUT;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if (readl(&mmc_base->stat)) {
+ printf("%s: timeout waiting for stat!\n", __func__);
+ return TIMEOUT;
}
/*
* CMDREG
writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd);
start = get_timer(0);
- do {
- mmc_stat = readl(&mmc_base->stat);
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s : timeout: No status update\n", __func__);
- return TIMEOUT;
- }
- } while (!mmc_stat);
+ while (!(mmc_stat = readl(&mmc_base->stat))) {
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if (!mmc_stat) {
+ printf("%s : timeout: No status update\n", __func__);
+ return TIMEOUT;
+ }
if ((mmc_stat & IE_CTO) != 0) {
mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC);
while (size) {
ulong start = get_timer(0);
- do {
- mmc_stat = readl(&mmc_base->stat);
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for status!\n",
- __func__);
- return TIMEOUT;
- }
- } while (mmc_stat == 0);
+
+ while (!(mmc_stat = readl(&mmc_base->stat))) {
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if (!mmc_stat) {
+ printf("%s: timeout waiting for status!\n", __func__);
+ return TIMEOUT;
+ }
if ((mmc_stat & (IE_DTO | IE_DCRC | IE_DEB)) != 0)
mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
while (size) {
ulong start = get_timer(0);
- do {
- mmc_stat = readl(&mmc_base->stat);
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for status!\n",
- __func__);
- return TIMEOUT;
- }
- } while (mmc_stat == 0);
+
+ while (!(mmc_stat = readl(&mmc_base->stat))) {
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if (!mmc_stat) {
+ printf("%s: timeout waiting for status!\n", __func__);
+ return TIMEOUT;
+ }
if ((mmc_stat & (IE_DTO | IE_DCRC | IE_DEB)) != 0)
mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
static void mmc_set_ios(struct mmc *mmc)
{
- struct hsmmc *mmc_base = (struct hsmmc *)mmc->priv;
+ struct omap_hsmmc_data *priv_data = mmc->priv;
+ struct hsmmc *mmc_base = priv_data->base_addr;
unsigned int dsor = 0;
ulong start;
start = get_timer(0);
while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
- if (get_timer(start) > MAX_RETRY_MS) {
- printf("%s: timeout waiting for ics!\n", __func__);
- return;
- }
+ if (get_timer(start) > MAX_RETRY_MS)
+ break;
+ }
+ if ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) {
+ printf("%s: timeout waiting for ics!\n", __func__);
+ return;
}
writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
}
-int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max)
+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
+ int wp_gpio)
{
struct mmc *mmc;
-
- mmc = &hsmmc_dev[dev_index];
-
- sprintf(mmc->name, "OMAP SD/MMC");
- mmc->send_cmd = mmc_send_cmd;
- mmc->set_ios = mmc_set_ios;
- mmc->init = mmc_init_setup;
- mmc->getcd = NULL;
+ struct omap_hsmmc_data *priv_data;
+ unsigned long base_addr;
switch (dev_index) {
case 0:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC1_BASE;
+ base_addr = OMAP_HSMMC1_BASE;
break;
#ifdef OMAP_HSMMC2_BASE
case 1:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC2_BASE;
+ base_addr = OMAP_HSMMC2_BASE;
break;
#endif
#ifdef OMAP_HSMMC3_BASE
case 2:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC3_BASE;
+ base_addr = OMAP_HSMMC3_BASE;
break;
#endif
default:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC1_BASE;
+ printf("Invalid MMC device index: %d\n", dev_index);
return 1;
}
+
+ mmc = &hsmmc_dev[dev_index];
+ priv_data = &hsmmc_dev_data[dev_index];
+ priv_data->base_addr = (void *)base_addr;
+
+ sprintf(mmc->name, "OMAP SD/MMC");
+ mmc->send_cmd = mmc_send_cmd;
+ mmc->set_ios = mmc_set_ios;
+ mmc->init = mmc_init_setup;
+ mmc->priv = priv_data;
+
+ priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd");
+ if (priv_data->cd_gpio != -1)
+ mmc->getcd = omap_mmc_getcd;
+
+ priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp");
+ if (priv_data->wp_gpio != -1)
+ mmc->getwp = omap_mmc_getwp;
+
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
MMC_MODE_HC) & ~host_caps_mask;
projects / karo-tx-uboot.git / blobdiff