* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
* Copyright 2009 Ilya Yanok, <yanok@emcraft.com>
*
- * Copyright 2012 Lothar Waßmann <LW@KARO-electronics.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <nand.h>
#include <linux/err.h>
#include <asm/io.h>
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
- defined(CONFIG_MX51) || defined(CONFIG_MX53)
+#if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX35) || \
+ defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53)
#include <asm/arch/imx-regs.h>
#endif
-#ifdef DEBUG
-#define pr_debug(fmt...) printk(fmt)
-#else
-#define pr_debug(fmt...) do { } while (0)
-#endif
-
-typedef enum _bool { false, true } bool;
-
static struct mxc_nand_host mxc_host;
static struct mxc_nand_host *host = &mxc_host;
-#ifdef CONFIG_MX27
+#ifdef CONFIG_SOC_MX27
static int is_16bit_nand(void)
{
struct system_control_regs *sc_regs =
else
return 0;
}
-#elif defined(CONFIG_MX31)
+#elif defined(CONFIG_SOC_MX31)
static int is_16bit_nand(void)
{
struct clock_control_regs *sc_regs =
else
return 0;
}
-#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
+#elif defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX35)
static int is_16bit_nand(void)
{
struct ccm_regs *ccm =
else
return 0;
}
-#elif defined(CONFIG_MX51)
+#elif defined(CONFIG_SOC_MX51)
static int is_16bit_nand(void)
{
struct src *src = (struct src *)SRC_BASE_ADDR;
else
return 0;
}
-#elif defined(CONFIG_MX53)
+#elif defined(CONFIG_SOC_MX53)
/* BOOT_CFG[1..3][0..7] */
#define SRC_BOOT_CFG(m, n) (1 << ((m) * 8 + (n)))
static int is_16bit_nand(void)
#error CONFIG_MXC_NAND_REGS_BASE not defined
#endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX31)
+#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX31)
#define nfc_is_v1() 1
#define nfc_is_v21() 0
#define nfc_is_v3_2() 0
#define nfc_is_v3() nfc_is_v3_2()
#define NFC_VERSION "V1"
-#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
+#elif defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX35)
#define nfc_is_v1() 0
#define nfc_is_v21() 1
#define nfc_is_v3_2() 0
#define nfc_is_v3() nfc_is_v3_2()
#define NFC_VERSION "V2"
-#elif defined(CONFIG_MX51) || defined(CONFIG_MX53)
+#elif defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53)
#define nfc_is_v1() 0
#define nfc_is_v21() 0
#define nfc_is_v3_2() 1
#define nfc_is_v3() nfc_is_v3_2()
#define NFC_VERSION "V3"
-#ifndef CONFIG_MXC_NAND_IP_BASE
-#error CONFIG_MXC_NAND_IP_BASE not defined
+#ifndef CONFIG_MXC_NAND_IP_REGS_BASE
+#error CONFIG_MXC_NAND_IP_REGS_BASE not defined
#endif
#else
#error mxc_nand driver not supported on this platform
#define NFC_VERSION "unknown"
#endif
-#ifndef CONFIG_MXC_NAND_IP_BASE
-#define CONFIG_MXC_NAND_IP_BASE 0
-#endif
-
/* Addresses for NFC registers */
#define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
#define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
host->buf_start += n;
}
+#if defined(__UBOOT__) && defined(CONFIG_MTD_NAND_VERIFY_WRITE)
/* Used by the upper layer to verify the data in NAND Flash
* with the data in the buf. */
static int mxc_nand_verify_buf(struct mtd_info *mtd,
{
return -EFAULT;
}
+#endif
/* This function is used by upper layer for select and
* deselect of the NAND chip */
}
if (mtd->writesize) {
-#if defined CONFIG_MX53
+#if defined CONFIG_SOC_MX53
config2 |= MX53_CONFIG2_PPB(ffs(mtd->erasesize / mtd->writesize) - 6);
#else
config2 |= NFC_V3_CONFIG2_PPB(ffs(mtd->erasesize / mtd->writesize) - 6);
this->read_word = mxc_nand_read_word;
this->write_buf = mxc_nand_write_buf;
this->read_buf = mxc_nand_read_buf;
+#if defined(__UBOOT__) && defined(CONFIG_MTD_NAND_VERIFY_WRITE)
this->verify_buf = mxc_nand_verify_buf;
-
+#endif
host->base = (void __iomem *)CONFIG_MXC_NAND_REGS_BASE;
if (!host->base) {
return;
this->ecc.bytes = 3;
host->eccsize = 1;
} else if (nfc_is_v3_2()) {
- host->regs_ip = (void __iomem *)CONFIG_MXC_NAND_IP_BASE;
+ host->regs_ip = (void __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
host->regs_axi = host->base + 0x1e00;
host->spare0 = host->base + 0x1000;
host->spare_len = 64;
host->get_dev_status = get_dev_status_v3;
oob_smallpage = &nandv2_hw_eccoob_smallpage;
oob_largepage = &nandv2_hw_eccoob_largepage;
+ this->ecc.strength = 4;
} else
hang();
this->options |= NAND_BUSWIDTH_16;
#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
- this->options |= NAND_USE_FLASH_BBT;
+ this->bbt_options |= NAND_BBT_USE_FLASH;
this->bbt_td = &bbt_main_descr;
this->bbt_md = &bbt_mirror_descr;
this->bbt_td->options |= NAND_BBT_CREATE;