]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - drivers/net/npe/IxEthMii.c
Update from 2013.01 to 2013.07
[karo-tx-uboot.git] / drivers / net / npe / IxEthMii.c
index 4d92f17eef779a9943aaea344f451f6d3b6a44ee..f8b439d9da5cdd47ff62bb1677eb11752984ae4e 100644 (file)
@@ -65,7 +65,7 @@ PRIVATE UINT32 ixEthMiiPhyId[IXP425_ETH_ACC_MII_MAX_ADDR];
  * Scan for PHYs on the MII bus. This function returns
  * an array of booleans, one for each PHY address.
  * If a PHY is found at a particular address, the
- * corresponding entry in the array is set to TRUE.
+ * corresponding entry in the array is set to true.
  *
  */
 
@@ -89,7 +89,7 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
         i<IXP425_ETH_ACC_MII_MAX_ADDR;
        i++)
     {
-       phyPresent[i] = FALSE;
+       phyPresent[i] = false;
     }
 
     /* iterate through the PHY addresses */
@@ -119,7 +119,7 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
                    )
                {
                    /* supported phy */
-                   phyPresent[i] = TRUE;
+                   phyPresent[i] = true;
                } /* end of if(ixEthMiiPhyId) */
                else
                {
@@ -131,7 +131,7 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
                                    "ixEthMiiPhyScan : unexpected Mii PHY ID %8.8x\n", 
                                    ixEthMiiPhyId[i], 2, 3, 4, 5, 6);
                        ixEthMiiPhyId[i] = IX_ETH_MII_UNKNOWN_PHY_ID;
-                       phyPresent[i] = TRUE;
+                       phyPresent[i] = true;
                    }
                } 
            }
@@ -347,10 +347,10 @@ ixEthMiiLinkStatus(UINT32 phyAddr,
        return IX_FAIL;
     }
 
-    *linkUp = FALSE;
-    *speed100 = FALSE;
-    *fullDuplex = FALSE;
-    *autoneg = FALSE;
+    *linkUp = false;
+    *speed100 = false;
+    *fullDuplex = false;
+    *autoneg = false;
 
     if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
        (ixEthMiiPhyId[phyAddr] != IX_ETH_MII_INVALID_PHY_ID))
@@ -406,20 +406,20 @@ ixEthMiiLinkStatus(UINT32 phyAddr,
                    if ((regval & IX_ETH_MII_SR_TX_FULL_DPX) != 0)
                    {
                        /* 100 Base X full dplx */
-                       *speed100 = TRUE;
-                       *fullDuplex = TRUE;
+                       *speed100 = true;
+                       *fullDuplex = true;
                        return IX_SUCCESS;
                    }
                    if ((regval & IX_ETH_MII_SR_TX_HALF_DPX) != 0)
                    {
                        /* 100 Base X half dplx */
-                       *speed100 = TRUE;
+                       *speed100 = true;
                        return IX_SUCCESS;
                    }
                    if ((regval & IX_ETH_MII_SR_10T_FULL_DPX) != 0)
                    {
                        /* 10 mb full dplx */
-                       *fullDuplex = TRUE;
+                       *fullDuplex = true;
                        return IX_SUCCESS;
                    }
                    if ((regval & IX_ETH_MII_SR_10T_HALF_DPX) != 0)