sf: Tidy up public and private header files

[karo-tx-uboot.git] / drivers / pci / fsl_pci_init.c

diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 2085cd6b9b2c6b0811bff08d15fb7949dabdc7a0..231b07573f5b15a35c472bbf8c6cfcb124166412 100644 (file)
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -49,8 +49,13 @@ static void set_inbound_window(volatile pit_t *pi,
                                u64 size)
 {
        u32 sz = (__ilog2_u64(size) - 1);
-       u32 flag = PIWAR_EN | PIWAR_LOCAL |
-                       PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
+       u32 flag = 0;
+#else
+       u32 flag = PIWAR_LOCAL;
+#endif
+
+       flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
 
        out_be32(&pi->pitar, r->phys_start >> 12);
        out_be32(&pi->piwbar, r->bus_start >> 12);
@@ -499,8 +504,14 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
                }
 #endif
                if (!enabled) {
-                       /* Let the user know there's no PCIe link */
-                       printf("no link, regs @ 0x%lx\n", pci_info->regs);
+                       /* Let the user know there's no PCIe link for root
+                        * complex. for endpoint, the link may not setup, so
+                        * print undetermined.
+                        */
+                       if (fsl_is_pci_agent(hose))
+                               printf("undetermined, regs @ 0x%lx\n", pci_info->regs);
+                       else
+                               printf("no link, regs @ 0x%lx\n", pci_info->regs);
                        hose->last_busno = hose->first_busno;
                        return;
                }
@@ -510,8 +521,8 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
 
                /* Print the negotiated PCIe link width */
                pci_hose_read_config_word(hose, dev, pci_lsr, &temp16);
-               printf("x%d, regs @ 0x%lx\n", (temp16 & 0x3f0 ) >> 4,
-                       pci_info->regs);
+               printf("x%d gen%d, regs @ 0x%lx\n", (temp16 & 0x3f0) >> 4,
+                      (temp16 & 0xf), pci_info->regs);
 
                hose->current_busno++; /* Start scan with secondary */
                pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);