* Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
*
* (C) Copyright 2003
- * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
+ * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
*
* Note: Much of this code has been derived from Linux 2.4
* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
* Modified for the MP2USB by (C) Copyright 2005 Eric Benard
* ebenard@eukrea.com - based on s3c24x0's driver
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
* IMPORTANT NOTES
#endif
#if defined(CONFIG_ARM920T) || \
- defined(CONFIG_S3C2400) || \
- defined(CONFIG_S3C2410) || \
- defined(CONFIG_S3C6400) || \
+ defined(CONFIG_S3C24X0) || \
defined(CONFIG_440EP) || \
defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_MPC5200) || \
#define OHCI_CONTROL_INIT \
(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-/*
- * e.g. PCI controllers need this
- */
-#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
-# define readl(a) __swap_32(*((volatile u32 *)(a)))
-# define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
-#else
-# define readl(a) (*((volatile u32 *)(a)))
-# define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
-#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
-
#define min_t(type, x, y) \
({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
struct usb_device *devgone;
static inline u32 roothub_a(struct ohci *hc)
- { return readl(&hc->regs->roothub.a); }
+ { return ohci_readl(&hc->regs->roothub.a); }
static inline u32 roothub_b(struct ohci *hc)
- { return readl(&hc->regs->roothub.b); }
+ { return ohci_readl(&hc->regs->roothub.b); }
static inline u32 roothub_status(struct ohci *hc)
- { return readl(&hc->regs->roothub.status); }
+ { return ohci_readl(&hc->regs->roothub.status); }
static inline u32 roothub_portstatus(struct ohci *hc, int i)
- { return readl(&hc->regs->roothub.portstatus[i]); }
+ { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
/* forward declaration */
static int hc_interrupt(void);
struct ohci_regs *regs = controller->regs;
__u32 temp;
- temp = readl(®s->revision) & 0xff;
+ temp = ohci_readl(®s->revision) & 0xff;
if (temp != 0x10)
dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
- temp = readl(®s->control);
+ temp = ohci_readl(®s->control);
dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
(temp & OHCI_CTRL_RWE) ? " RWE" : "",
(temp & OHCI_CTRL_RWC) ? " RWC" : "",
temp & OHCI_CTRL_CBSR
);
- temp = readl(®s->cmdstatus);
+ temp = ohci_readl(®s->cmdstatus);
dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
(temp & OHCI_SOC) >> 16,
(temp & OHCI_OCR) ? " OCR" : "",
(temp & OHCI_HCR) ? " HCR" : ""
);
- ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
- ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
+ ohci_dump_intr_mask("intrstatus", ohci_readl(®s->intrstatus));
+ ohci_dump_intr_mask("intrenable", ohci_readl(®s->intrenable));
- maybe_print_eds("ed_periodcurrent", readl(®s->ed_periodcurrent));
+ maybe_print_eds("ed_periodcurrent",
+ ohci_readl(®s->ed_periodcurrent));
- maybe_print_eds("ed_controlhead", readl(®s->ed_controlhead));
- maybe_print_eds("ed_controlcurrent", readl(®s->ed_controlcurrent));
+ maybe_print_eds("ed_controlhead", ohci_readl(®s->ed_controlhead));
+ maybe_print_eds("ed_controlcurrent",
+ ohci_readl(®s->ed_controlcurrent));
- maybe_print_eds("ed_bulkhead", readl(®s->ed_bulkhead));
- maybe_print_eds("ed_bulkcurrent", readl(®s->ed_bulkcurrent));
+ maybe_print_eds("ed_bulkhead", ohci_readl(®s->ed_bulkhead));
+ maybe_print_eds("ed_bulkcurrent", ohci_readl(®s->ed_bulkcurrent));
- maybe_print_eds("donehead", readl(®s->donehead));
+ maybe_print_eds("donehead", ohci_readl(®s->donehead));
}
static void ohci_dump_roothub(ohci_t *controller, int verbose)
/* implicitly requeued */
if (urb->dev->irq_handle &&
(urb->dev->irq_act_len = urb->actual_length)) {
- writel(OHCI_INTR_WDH, ®s->intrenable);
- readl(®s->intrenable); /* PCI posting flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrenable);
+ ohci_readl(®s->intrenable); /* PCI posting flush */
urb->dev->irq_handle(urb->dev);
- writel(OHCI_INTR_WDH, ®s->intrdisable);
- readl(®s->intrdisable); /* PCI posting flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrdisable);
+ ohci_readl(®s->intrdisable); /* PCI posting flush */
}
urb->actual_length = 0;
td_submit_job(
case PIPE_CONTROL:
ed->hwNextED = 0;
if (ohci->ed_controltail == NULL)
- writel(ed, &ohci->regs->ed_controlhead);
+ ohci_writel(ed, &ohci->regs->ed_controlhead);
else
ohci->ed_controltail->hwNextED =
m32_swap((unsigned long)ed);
if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
!ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_CLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_controltail = edi;
break;
case PIPE_BULK:
ed->hwNextED = 0;
if (ohci->ed_bulktail == NULL)
- writel(ed, &ohci->regs->ed_bulkhead);
+ ohci_writel(ed, &ohci->regs->ed_bulkhead);
else
ohci->ed_bulktail->hwNextED =
m32_swap((unsigned long)ed);
if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
!ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_BLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_bulktail = edi;
break;
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_CLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control,
+ &ohci->regs->control);
}
- writel(m32_swap(*((__u32 *)&ed->hwNextED)),
+ ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
&ohci->regs->ed_controlhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_BLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control,
+ &ohci->regs->control);
}
- writel(m32_swap(*((__u32 *)&ed->hwNextED)),
+ ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
&ohci->regs->ed_bulkhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
| (usb_pipeisoc(pipe)? 0x8000: 0)
| (usb_pipecontrol(pipe)? 0: \
(usb_pipeout(pipe)? 0x800: 0x1000))
- | usb_pipeslow(pipe) << 13
+ | (usb_dev->speed == USB_SPEED_LOW) << 13
| usb_maxpacket(usb_dev, pipe) << 16);
if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
if (!ohci->sleeping) {
/* start bulk list */
- writel(OHCI_BLF, &ohci->regs->cmdstatus);
+ ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
}
break;
if (!ohci->sleeping) {
/* start Control list */
- writel(OHCI_CLF, &ohci->regs->cmdstatus);
+ ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
}
break;
static void dl_transfer_length(td_t *td)
{
- __u32 tdINFO, tdBE, tdCBP;
+ __u32 tdBE, tdCBP;
urb_priv_t *lurb_priv = td->ed->purb;
- tdINFO = m32_swap(td->hwINFO);
tdBE = m32_swap(td->hwBE);
tdCBP = m32_swap(td->hwCBP);
* Virtual Root Hub
*-------------------------------------------------------------------------*/
-/* Device descriptor */
-static __u8 root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x10, /* __u16 bcdUSB; v1.1 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x00, /* __u8 iManufacturer; */
- 0x01, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-/* Configuration descriptor */
-static __u8 root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
-};
-
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'O', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
-};
+#include <usbroothubdes.h>
/* Hub class-specific descriptor is constructed dynamically */
#define OK(x) len = (x); break
#ifdef DEBUG
-#define WR_RH_STAT(x) {info("WR:status %#8x", (x)); writel((x), \
+#define WR_RH_STAT(x) {info("WR:status %#8x", (x)); ohci_writel((x), \
&gohci.regs->roothub.status); }
#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
- (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
+ (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
#else
-#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
-#define WR_RH_PORTSTAT(x) writel((x), \
+#define WR_RH_STAT(x) ohci_writel((x), &gohci.regs->roothub.status)
+#define WR_RH_PORTSTAT(x) ohci_writel((x), \
&gohci.regs->roothub.portstatus[wIndex-1])
#endif
#define RD_RH_STAT roothub_status(&gohci)
int leni = transfer_len;
int len = 0;
int stat = 0;
- __u32 datab[4];
- __u8 *data_buf = (__u8 *)datab;
__u16 bmRType_bReq;
__u16 wValue;
__u16 wIndex;
__u16 wLength;
+ ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
#ifdef DEBUG
pkt_print(NULL, dev, pipe, buffer, transfer_len,
cmd, "SUB(rh)", usb_pipein(pipe));
#else
- wait_ms(1);
+ mdelay(1);
#endif
if (usb_pipeint(pipe)) {
info("Root-Hub submit IRQ: NOT implemented");
*/
case RH_GET_STATUS:
- *(__u16 *) data_buf = cpu_to_le16(1);
+ *(u16 *)databuf = cpu_to_le16(1);
OK(2);
case RH_GET_STATUS | RH_INTERFACE:
- *(__u16 *) data_buf = cpu_to_le16(0);
+ *(u16 *)databuf = cpu_to_le16(0);
OK(2);
case RH_GET_STATUS | RH_ENDPOINT:
- *(__u16 *) data_buf = cpu_to_le16(0);
+ *(u16 *)databuf = cpu_to_le16(0);
OK(2);
case RH_GET_STATUS | RH_CLASS:
- *(__u32 *) data_buf = cpu_to_le32(
+ *(u32 *)databuf = cpu_to_le32(
RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
OK(4);
case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- *(__u32 *) data_buf = cpu_to_le32(RD_RH_PORTSTAT);
+ *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
OK(4);
case RH_CLEAR_FEATURE | RH_ENDPOINT:
OK(0);
case (RH_PORT_POWER):
WR_RH_PORTSTAT(RH_PS_PPS);
- wait_ms(100);
+ mdelay(100);
OK(0);
case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
if (RD_RH_PORTSTAT & RH_PS_CCS)
min_t(unsigned int,
sizeof(root_hub_dev_des),
wLength));
- data_buf = root_hub_dev_des; OK(len);
+ databuf = root_hub_dev_des; OK(len);
case (0x02): /* configuration descriptor */
len = min_t(unsigned int,
leni,
min_t(unsigned int,
sizeof(root_hub_config_des),
wLength));
- data_buf = root_hub_config_des; OK(len);
+ databuf = root_hub_config_des; OK(len);
case (0x03): /* string descriptors */
if (wValue == 0x0300) {
len = min_t(unsigned int,
min_t(unsigned int,
sizeof(root_hub_str_index0),
wLength));
- data_buf = root_hub_str_index0;
+ databuf = root_hub_str_index0;
OK(len);
}
if (wValue == 0x0301) {
min_t(unsigned int,
sizeof(root_hub_str_index1),
wLength));
- data_buf = root_hub_str_index1;
+ databuf = root_hub_str_index1;
OK(len);
}
default:
{
__u32 temp = roothub_a(&gohci);
- data_buf [0] = 9; /* min length; */
- data_buf [1] = 0x29;
- data_buf [2] = temp & RH_A_NDP;
+ databuf[0] = 9; /* min length; */
+ databuf[1] = 0x29;
+ databuf[2] = temp & RH_A_NDP;
#ifdef CONFIG_AT91C_PQFP_UHPBUG
- data_buf [2] = (data_buf [2] == 2) ? 1:0;
+ databuf[2] = (databuf[2] == 2) ? 1 : 0;
#endif
- data_buf [3] = 0;
+ databuf[3] = 0;
if (temp & RH_A_PSM) /* per-port power switching? */
- data_buf [3] |= 0x1;
+ databuf[3] |= 0x1;
if (temp & RH_A_NOCP) /* no overcurrent reporting? */
- data_buf [3] |= 0x10;
+ databuf[3] |= 0x10;
else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
- data_buf [3] |= 0x8;
+ databuf[3] |= 0x8;
- /* corresponds to data_buf[4-7] */
- datab [1] = 0;
- data_buf [5] = (temp & RH_A_POTPGT) >> 24;
+ databuf[4] = 0;
+ databuf[5] = (temp & RH_A_POTPGT) >> 24;
+ databuf[6] = 0;
temp = roothub_b(&gohci);
- data_buf [7] = temp & RH_B_DR;
- if (data_buf [2] < 7) {
- data_buf [8] = 0xff;
+ databuf[7] = temp & RH_B_DR;
+ if (databuf[2] < 7) {
+ databuf[8] = 0xff;
} else {
- data_buf [0] += 2;
- data_buf [8] = (temp & RH_B_DR) >> 8;
- data_buf [10] = data_buf [9] = 0xff;
+ databuf[0] += 2;
+ databuf[8] = (temp & RH_B_DR) >> 8;
+ databuf[10] = databuf[9] = 0xff;
}
len = min_t(unsigned int, leni,
- min_t(unsigned int, data_buf [0], wLength));
+ min_t(unsigned int, databuf[0], wLength));
OK(len);
}
- case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK(1);
+ case RH_GET_CONFIGURATION:
+ databuf[0] = 0x01;
+ OK(1);
- case RH_SET_CONFIGURATION: WR_RH_STAT(0x10000); OK(0);
+ case RH_SET_CONFIGURATION:
+ WR_RH_STAT(0x10000);
+ OK(0);
default:
dbg("unsupported root hub command");
#ifdef DEBUG
ohci_dump_roothub(&gohci, 1);
#else
- wait_ms(1);
+ mdelay(1);
#endif
len = min_t(int, len, leni);
- if (data != data_buf)
- memcpy(data, data_buf, len);
+ if (data != databuf)
+ memcpy(data, databuf, len);
dev->act_len = len;
dev->status = stat;
pkt_print(NULL, dev, pipe, buffer,
transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
#else
- wait_ms(1);
+ mdelay(1);
#endif
return stat;
pkt_print(urb, dev, pipe, buffer, transfer_len,
setup, "SUB", usb_pipein(pipe));
#else
- wait_ms(1);
+ mdelay(1);
#endif
if (!maxsize) {
err("submit_common_message: pipesize for pipe %lx is zero",
}
#if 0
- wait_ms(10);
+ mdelay(10);
/* ohci_dump_status(&gohci); */
#endif
- /* allow more time for a BULK device to react - some are slow */
-#define BULK_TO 5000 /* timeout in milliseconds */
- if (usb_pipebulk(pipe))
- timeout = BULK_TO;
- else
- timeout = 100;
+ timeout = USB_TIMEOUT_MS(pipe);
/* wait for it to complete */
for (;;) {
}
if (--timeout) {
- wait_ms(1);
+ mdelay(1);
if (!urb->finished)
dbg("*");
}
dev->status = stat;
- dev->act_len = transfer_len;
+ dev->act_len = urb->actual_length;
#ifdef DEBUG
pkt_print(urb, dev, pipe, buffer, transfer_len,
setup, "RET(ctlr)", usb_pipein(pipe));
#else
- wait_ms(1);
+ mdelay(1);
#endif
/* free TDs in urb_priv */
pkt_print(NULL, dev, pipe, buffer, transfer_len,
setup, "SUB", usb_pipein(pipe));
#else
- wait_ms(1);
+ mdelay(1);
#endif
if (!maxsize) {
err("submit_control_message: pipesize for pipe %lx is zero",
int timeout = 1000;
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
- writel(readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
- base + EHCI_USBCMD_OFF);
+ base += EHCI_USBCMD_OFF;
+ ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
- while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
+ while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
if (timeout-- <= 0) {
printf("USB RootHub reset timed out!");
break;
} else
printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
#endif
- if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
- /* SMM owns the HC */
- writel(OHCI_OCR, &ohci->regs->cmdstatus);/* request ownership */
+ if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ /* SMM owns the HC, request ownership */
+ ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
info("USB HC TakeOver from SMM");
- while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
- wait_ms(10);
+ while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ mdelay(10);
if (--smm_timeout == 0) {
err("USB HC TakeOver failed!");
return -1;
}
/* Disable HC interrupts */
- writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
+ ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
ohci->slot_name,
- readl(&ohci->regs->control));
+ ohci_readl(&ohci->regs->control));
/* Reset USB (needed by some controllers) */
ohci->hc_control = 0;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
/* HC Reset requires max 10 us delay */
- writel(OHCI_HCR, &ohci->regs->cmdstatus);
- while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
+ ohci_writel(OHCI_HCR, &ohci->regs->cmdstatus);
+ while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
if (--timeout == 0) {
err("USB HC reset timed out!");
return -1;
/* Tell the controller where the control and bulk lists are
* The lists are empty now. */
- writel(0, &ohci->regs->ed_controlhead);
- writel(0, &ohci->regs->ed_bulkhead);
+ ohci_writel(0, &ohci->regs->ed_controlhead);
+ ohci_writel(0, &ohci->regs->ed_bulkhead);
- writel((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
+ ohci_writel((__u32)ohci->hcca,
+ &ohci->regs->hcca); /* reset clears this */
fminterval = 0x2edf;
- writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
+ ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
- writel(fminterval, &ohci->regs->fminterval);
- writel(0x628, &ohci->regs->lsthresh);
+ ohci_writel(fminterval, &ohci->regs->fminterval);
+ ohci_writel(0x628, &ohci->regs->lsthresh);
/* start controller operations */
ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
ohci->disabled = 0;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
/* disable all interrupts */
mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
OHCI_INTR_OC | OHCI_INTR_MIE);
- writel(mask, &ohci->regs->intrdisable);
+ ohci_writel(mask, &ohci->regs->intrdisable);
/* clear all interrupts */
mask &= ~OHCI_INTR_MIE;
- writel(mask, &ohci->regs->intrstatus);
+ ohci_writel(mask, &ohci->regs->intrstatus);
/* Choose the interrupts we care about now - but w/o MIE */
mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
- writel(mask, &ohci->regs->intrenable);
+ ohci_writel(mask, &ohci->regs->intrenable);
#ifdef OHCI_USE_NPS
/* required for AMD-756 and some Mac platforms */
- writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
+ ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
&ohci->regs->roothub.a);
- writel(RH_HS_LPSC, &ohci->regs->roothub.status);
+ ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
#endif /* OHCI_USE_NPS */
-#define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
/* POTPGT delay is bits 24-31, in 2 ms units. */
mdelay((roothub_a(ohci) >> 23) & 0x1fe);
/*-------------------------------------------------------------------------*/
-/* Poll USB interrupt. */
-void usb_event_poll(void)
-{
- hc_interrupt();
-}
-
/* an interrupt happens */
static int hc_interrupt(void)
!(m32_swap(ohci->hcca->done_head) & 0x01)) {
ints = OHCI_INTR_WDH;
} else {
- ints = readl(®s->intrstatus);
+ ints = ohci_readl(®s->intrstatus);
if (ints == ~(u32)0) {
ohci->disabled++;
err("%s device removed!", ohci->slot_name);
return -1;
} else {
- ints &= readl(®s->intrenable);
+ ints &= ohci_readl(®s->intrenable);
if (ints == 0) {
dbg("hc_interrupt: returning..\n");
return 0xff;
#ifdef DEBUG
ohci_dump(ohci, 1);
#else
- wait_ms(1);
+ mdelay(1);
#endif
/* FIXME: be optimistic, hope that bug won't repeat often. */
/* Make some non-interrupt context restart the controller. */
}
if (ints & OHCI_INTR_WDH) {
- wait_ms(1);
- writel(OHCI_INTR_WDH, ®s->intrdisable);
- (void)readl(®s->intrdisable); /* flush */
+ mdelay(1);
+ ohci_writel(OHCI_INTR_WDH, ®s->intrdisable);
+ (void)ohci_readl(®s->intrdisable); /* flush */
stat = dl_done_list(&gohci);
- writel(OHCI_INTR_WDH, ®s->intrenable);
- (void)readl(®s->intrdisable); /* flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrenable);
+ (void)ohci_readl(®s->intrdisable); /* flush */
}
if (ints & OHCI_INTR_SO) {
dbg("USB Schedule overrun\n");
- writel(OHCI_INTR_SO, ®s->intrenable);
+ ohci_writel(OHCI_INTR_SO, ®s->intrenable);
stat = -1;
}
/* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
if (ints & OHCI_INTR_SF) {
unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
- wait_ms(1);
- writel(OHCI_INTR_SF, ®s->intrdisable);
+ mdelay(1);
+ ohci_writel(OHCI_INTR_SF, ®s->intrdisable);
if (ohci->ed_rm_list[frame] != NULL)
- writel(OHCI_INTR_SF, ®s->intrenable);
+ ohci_writel(OHCI_INTR_SF, ®s->intrenable);
stat = 0xff;
}
- writel(ints, ®s->intrstatus);
+ ohci_writel(ints, ®s->intrstatus);
return stat;
}
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
#ifdef CONFIG_PCI_OHCI
pci_dev_t pdev;
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant init */
- if (usb_board_init())
+ if (board_usb_init(index, USB_INIT_HOST))
return -1;
#endif
memset(&gohci, 0, sizeof(ohci_t));
err ("can't reset usb-%s", gohci.slot_name);
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant cleanup */
- usb_board_init_fail();
+ board_usb_cleanup(index, USB_INIT_HOST);
#endif
#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
#ifdef DEBUG
ohci_dump(&gohci, 1);
#else
- wait_ms(1);
+ mdelay(1);
#endif
ohci_inited = 1;
return 0;
}
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
/* this gets called really early - before the controller has */
/* even been initialized! */
projects / karo-tx-uboot.git / blobdiff