video: atmel_hlcdfb: fix reversed parameters in lcd_writel() call

[karo-tx-uboot.git] / drivers / video / atmel_hlcdfb.c

diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 935ae42a9c873904ff8e7a174332438fe5d7d34c..361c7da92d6a40b02732c0f5b41b03f47388222c 100644 (file)
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -31,10 +31,10 @@
  */
 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
 {
-       lcdc_writel(((red << LCDC_BASECLUT_RCLUT_Pos) & LCDC_BASECLUT_RCLUT_Msk)
-               | ((green << LCDC_BASECLUT_GCLUT_Pos) & LCDC_BASECLUT_GCLUT_Msk)
-               | ((blue << LCDC_BASECLUT_BCLUT_Pos) & LCDC_BASECLUT_BCLUT_Msk),
-               panel_info.mmio + ATMEL_LCDC_LUT(regno));
+       lcdc_writel(panel_info.mmio + ATMEL_LCDC_LUT(regno),
+               ((red << LCDC_BASECLUT_RCLUT_Pos) & LCDC_BASECLUT_RCLUT_Msk) |
+               ((green << LCDC_BASECLUT_GCLUT_Pos) & LCDC_BASECLUT_GCLUT_Msk) |
+               ((blue << LCDC_BASECLUT_BCLUT_Pos) & LCDC_BASECLUT_BCLUT_Msk));
 }
 
 void lcd_ctrl_init(void *lcdbase)
@@ -42,11 +42,13 @@ void lcd_ctrl_init(void *lcdbase)
        unsigned long value;
        struct lcd_dma_desc *desc;
        struct atmel_hlcd_regs *regs;
+       u32 clk_pol;
 
        if (!has_lcdc())
                return;     /* No lcdc */
 
-       regs = (struct atmel_hlcd_regs *)panel_info.mmio;
+       regs = panel_info.mmio;
+       clk_pol = panel_info.vl_clk_pol ? LCDC_LCDCFG0_CLKPOL : 0;
 
        /* Disable DISP signal */
        lcdc_writel(&regs->lcdc_lcddis, LCDC_LCDDIS_DISPDIS);
@@ -78,8 +80,8 @@ void lcd_ctrl_init(void *lcdbase)
                                        | LCDC_LCDCFG0_CGDISHEO
                                        | LCDC_LCDCFG0_CGDISOVR1
                                        | LCDC_LCDCFG0_CGDISBASE
-                                       | panel_info.vl_clk_pol
-                                       | LCDC_LCDCFG0_CLKSEL);
+                                       | LCDC_LCDCFG0_CLKSEL
+                                       | clk_pol);
 
        } else {
                lcdc_writel(&regs->lcdc_lcdcfg0,
@@ -88,7 +90,7 @@ void lcd_ctrl_init(void *lcdbase)
                                | LCDC_LCDCFG0_CGDISHEO
                                | LCDC_LCDCFG0_CGDISOVR1
                                | LCDC_LCDCFG0_CGDISBASE
-                               | panel_info.vl_clk_pol);
+                               | clk_pol);
        }
 
        /* Initialize control register 5 */