video: atmel_hlcdfb: fix reversed parameters in lcd_writel() call

[karo-tx-uboot.git] / drivers / video / atmel_hlcdfb.c

diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index e74eb65f3e1a14aa2b14ba5f5adeb041c6753b38..361c7da92d6a40b02732c0f5b41b03f47388222c 100644 (file)
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -3,23 +3,7 @@
  *
  * Copyright (C) 2012 Atmel Corporation
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -29,14 +13,6 @@
 #include <lcd.h>
 #include <atmel_hlcdc.h>
 
-int lcd_line_length;
-
-void *lcd_base;                                /* Start of framebuffer memory  */
-void *lcd_console_address;             /* Start of console buffer      */
-
-short console_col;
-short console_row;
-
 /* configurable parameters */
 #define ATMEL_LCDC_CVAL_DEFAULT                0xc8
 #define ATMEL_LCDC_DMA_BURST_LEN       8
@@ -55,10 +31,10 @@ short console_row;
  */
 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
 {
-       lcdc_writel(((red << LCDC_BASECLUT_RCLUT_Pos) & LCDC_BASECLUT_RCLUT_Msk)
-               | ((green << LCDC_BASECLUT_GCLUT_Pos) & LCDC_BASECLUT_GCLUT_Msk)
-               | ((blue << LCDC_BASECLUT_BCLUT_Pos) & LCDC_BASECLUT_BCLUT_Msk),
-               panel_info.mmio + ATMEL_LCDC_LUT(regno));
+       lcdc_writel(panel_info.mmio + ATMEL_LCDC_LUT(regno),
+               ((red << LCDC_BASECLUT_RCLUT_Pos) & LCDC_BASECLUT_RCLUT_Msk) |
+               ((green << LCDC_BASECLUT_GCLUT_Pos) & LCDC_BASECLUT_GCLUT_Msk) |
+               ((blue << LCDC_BASECLUT_BCLUT_Pos) & LCDC_BASECLUT_BCLUT_Msk));
 }
 
 void lcd_ctrl_init(void *lcdbase)
@@ -66,11 +42,13 @@ void lcd_ctrl_init(void *lcdbase)
        unsigned long value;
        struct lcd_dma_desc *desc;
        struct atmel_hlcd_regs *regs;
+       u32 clk_pol;
 
        if (!has_lcdc())
                return;     /* No lcdc */
 
-       regs = (struct atmel_hlcd_regs *)panel_info.mmio;
+       regs = panel_info.mmio;
+       clk_pol = panel_info.vl_clk_pol ? LCDC_LCDCFG0_CLKPOL : 0;
 
        /* Disable DISP signal */
        lcdc_writel(&regs->lcdc_lcddis, LCDC_LCDDIS_DISPDIS);
@@ -102,8 +80,8 @@ void lcd_ctrl_init(void *lcdbase)
                                        | LCDC_LCDCFG0_CGDISHEO
                                        | LCDC_LCDCFG0_CGDISOVR1
                                        | LCDC_LCDCFG0_CGDISBASE
-                                       | panel_info.vl_clk_pol
-                                       | LCDC_LCDCFG0_CLKSEL);
+                                       | LCDC_LCDCFG0_CLKSEL
+                                       | clk_pol);
 
        } else {
                lcdc_writel(&regs->lcdc_lcdcfg0,
@@ -112,7 +90,7 @@ void lcd_ctrl_init(void *lcdbase)
                                | LCDC_LCDCFG0_CGDISHEO
                                | LCDC_LCDCFG0_CGDISOVR1
                                | LCDC_LCDCFG0_CGDISBASE
-                               | panel_info.vl_clk_pol);
+                               | clk_pol);
        }
 
        /* Initialize control register 5 */
@@ -152,12 +130,12 @@ void lcd_ctrl_init(void *lcdbase)
        value |= LCDC_LCDCFG1_HSPW(panel_info.vl_hsync_len - 1);
        lcdc_writel(&regs->lcdc_lcdcfg1, value);
 
-       value = LCDC_LCDCFG2_VBPW(panel_info.vl_lower_margin);
-       value |= LCDC_LCDCFG2_VFPW(panel_info.vl_upper_margin - 1);
+       value = LCDC_LCDCFG2_VBPW(panel_info.vl_upper_margin);
+       value |= LCDC_LCDCFG2_VFPW(panel_info.vl_lower_margin - 1);
        lcdc_writel(&regs->lcdc_lcdcfg2, value);
 
-       value = LCDC_LCDCFG3_HBPW(panel_info.vl_right_margin - 1);
-       value |= LCDC_LCDCFG3_HFPW(panel_info.vl_left_margin - 1);
+       value = LCDC_LCDCFG3_HBPW(panel_info.vl_left_margin - 1);
+       value |= LCDC_LCDCFG3_HFPW(panel_info.vl_right_margin - 1);
        lcdc_writel(&regs->lcdc_lcdcfg3, value);
 
        /* Display size */
@@ -195,6 +173,9 @@ void lcd_ctrl_init(void *lcdbase)
                        | LCDC_BASECTRL_DMAIEN | LCDC_BASECTRL_DFETCH;
        desc->next = (u32)desc;
 
+       /* Flush the DMA descriptor if we enabled dcache */
+       flush_dcache_range((u32)desc, (u32)desc + sizeof(*desc));
+
        lcdc_writel(&regs->lcdc_baseaddr, desc->address);
        lcdc_writel(&regs->lcdc_basectrl, desc->control);
        lcdc_writel(&regs->lcdc_basenext, desc->next);
@@ -218,4 +199,7 @@ void lcd_ctrl_init(void *lcdbase)
        lcdc_writel(&regs->lcdc_lcden, value | LCDC_LCDEN_PWMEN);
        while (!(lcdc_readl(&regs->lcdc_lcdsr) & LCDC_LCDSR_PWMSTS))
                udelay(1);
+
+       /* Enable flushing if we enabled dcache */
+       lcd_set_flush_dcache(1);
 }