* MPC8xx Communication Processor Module.
* Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
*
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
* This file contains structures and information for the communication
* processor channels. Some CPM control and status is available
* throught the MPC8xx internal memory map. See immap.h for details.
* as data ram for buffer descriptors, which is all we use right now.
* Currently the first 512 and last 256 bytes are used for microcode.
*/
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
#define CPM_DATAONLY_BASE ((uint)0x0800)
#define CPM_DATAONLY_SIZE ((uint)0x0700)
#define CPM_I2C_BASE 0x0820
#define CPM_SPI_BASE 0x0840
#define CPM_FEC_BASE 0x0860
-#define CPM_WLKBD_BASE 0x0880
+#define CPM_SERIAL2_BASE 0x08E0
#define CPM_SCC_BASE 0x0900
#define CPM_POST_BASE 0x0980
+#define CPM_WLKBD_BASE 0x0a00
#endif
-#ifndef CFG_CPM_POST_WORD_ADDR
+#ifndef CONFIG_SYS_CPM_POST_WORD_ADDR
#define CPM_POST_WORD_ADDR 0x07FC
#else
-#define CPM_POST_WORD_ADDR CFG_CPM_POST_WORD_ADDR
+#define CPM_POST_WORD_ADDR CONFIG_SYS_CPM_POST_WORD_ADDR
+#endif
+
+#ifndef CONFIG_SYS_CPM_BOOTCOUNT_ADDR
+#define CPM_BOOTCOUNT_ADDR (CPM_POST_WORD_ADDR - 2*sizeof(ulong))
+#else
+#define CPM_BOOTCOUNT_ADDR CONFIG_SYS_CPM_BOOTCOUNT_ADDR
#endif
#define BD_IIC_START ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
ushort smc_brkec; /* rcv'd break condition counter */
ushort smc_brkcr; /* xmt break count register */
ushort smc_rmask; /* Temporary bit mask */
+ u_char res1[8];
+ ushort smc_rpbase; /* Relocation pointer */
} smc_uart_t;
/* Function code bits.
/*** FADS860T********************************************************/
-#if defined(CONFIG_MPC860T) && defined(CONFIG_FADS)
-/* This ENET stuff is for the MPC860TFADS with ethernet on SCC1.
+#if defined(CONFIG_FADS) && defined(CONFIG_MPC86x)
+/*
+ * This ENET stuff is for the MPC86xFADS/MPC8xxADS with ethernet on SCC1.
*/
-
#ifdef CONFIG_SCC1_ENET
+
#define SCC_ENET 0
-#endif /* CONFIG_SCC1_ETHERNET */
+
#define PROFF_ENET PROFF_SCC1
#define CPM_CR_ENET CPM_CR_CH_SCC1
#define SICR_ENET_MASK ((uint)0x000000ff)
#define SICR_ENET_CLKRT ((uint)0x0000002c)
-/* This ENET stuff is for the MPC860TFADS with ethernet on FEC.
+#endif /* CONFIG_SCC1_ETHERNET */
+
+/*
+ * This ENET stuff is for the MPC860TFADS/MPC86xADS/MPC885ADS
+ * with ethernet on FEC.
*/
#ifdef CONFIG_FEC_ENET
-#define FEC_ENET /* use FEC for EThernet */
-#endif /* CONFIG_FEC_ETHERNET */
+#define FEC_ENET /* Use FEC for Ethernet */
+#endif /* CONFIG_FEC_ENET */
-#endif /* CONFIG_FADS860T */
+#endif /* CONFIG_FADS && CONFIG_MPC86x */
/*** FPS850L, FPS860L ************************************************/
#undef SCC_ENET
#define FEC_ENET
-#define PD_MII_TXD1 ((ushort)0x1000) /* PD 3 */
-#define PD_MII_TXD2 ((ushort)0x0800) /* PD 4 */
-#define PD_MII_TXD3 ((ushort)0x0400) /* PD 5 */
-#define PD_MII_RX_DV ((ushort)0x0200) /* PD 6 */
-#define PD_MII_RX_ERR ((ushort)0x0100) /* PD 7 */
-#define PD_MII_RX_CLK ((ushort)0x0080) /* PD 8 */
-#define PD_MII_TXD0 ((ushort)0x0040) /* PD 9 */
-#define PD_MII_RXD0 ((ushort)0x0020) /* PD 10 */
-#define PD_MII_TX_ERR ((ushort)0x0010) /* PD 11 */
-#define PD_MII_MDC ((ushort)0x0008) /* PD 12 */
-#define PD_MII_RXD1 ((ushort)0x0004) /* PD 13 */
-#define PD_MII_RXD2 ((ushort)0x0002) /* PD 14 */
-#define PD_MII_RXD3 ((ushort)0x0001) /* PD 15 */
+#define PD_MII_TXD1 ((ushort)0x1000) /* PD 3 */
+#define PD_MII_TXD2 ((ushort)0x0800) /* PD 4 */
+#define PD_MII_TXD3 ((ushort)0x0400) /* PD 5 */
+#define PD_MII_RX_DV ((ushort)0x0200) /* PD 6 */
+#define PD_MII_RX_ERR ((ushort)0x0100) /* PD 7 */
+#define PD_MII_RX_CLK ((ushort)0x0080) /* PD 8 */
+#define PD_MII_TXD0 ((ushort)0x0040) /* PD 9 */
+#define PD_MII_RXD0 ((ushort)0x0020) /* PD 10 */
+#define PD_MII_TX_ERR ((ushort)0x0010) /* PD 11 */
+#define PD_MII_MDC ((ushort)0x0008) /* PD 12 */
+#define PD_MII_RXD1 ((ushort)0x0004) /* PD 13 */
+#define PD_MII_RXD2 ((ushort)0x0002) /* PD 14 */
+#define PD_MII_RXD3 ((ushort)0x0001) /* PD 15 */
#define PD_MII_MASK ((ushort)0x1FFF) /* PD 3-15 */
#endif /* CONFIG_GEN860T */
#endif /* CONFIG_IVMS8, CONFIG_IVML24 */
-/*** KUP4K *********************************************************/
-/* The KUP4K uses the FEC on a MPC855T for Ethernet */
+/*** KUP4K, KUP4X ****************************************************/
+/* The KUP4 boards uses the FEC on a MPC8xx for Ethernet */
-#if defined(CONFIG_KUP4K)
+#if defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
#define FEC_ENET /* use FEC for EThernet */
#undef SCC_ENET
/*** LWMON **********************************************************/
-#if defined(CONFIG_LWMON) && !defined(CONFIG_8xx_CONS_SCC2)
+#if defined(CONFIG_LWMON)
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC2 use.
*/
#define SICR_ENET_CLKRT ((uint)0x0000003d)
#endif /* CONFIG_MBX */
+/*** KM8XX *********************************************************/
+
+/* The KM8XX Service Module uses SCC3 for Ethernet */
+
+#ifdef CONFIG_KM8XX
+#define PROFF_ENET PROFF_SCC3 /* Ethernet on SCC3 */
+#define CPM_CR_ENET CPM_CR_CH_SCC3
+#define SCC_ENET 2
+#define PA_ENET_RXD ((ushort)0x0010) /* PA 11 */
+#define PA_ENET_TXD ((ushort)0x0020) /* PA 10 */
+#define PA_ENET_RCLK ((ushort)0x1000) /* PA 3 CLK 5 */
+#define PA_ENET_TCLK ((ushort)0x2000) /* PA 2 CLK 6 */
+
+#define PC_ENET_TENA ((ushort)0x0004) /* PC 13 */
+
+#define PC_ENET_RENA ((ushort)0x0200) /* PC 6 */
+#define PC_ENET_CLSN ((ushort)0x0100) /* PC 7 */
+
+/* Control bits in the SICR to route TCLK (CLK6) and RCLK (CLK5) to
+ * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x00FF0000)
+#define SICR_ENET_CLKRT ((uint)0x00250000)
+#endif /* CONFIG_KM8XX */
+
+
/*** MHPC ********************************************************/
#if defined(CONFIG_MHPC)
# endif /* CONFIG_FEC_ENET */
#endif /* CONFIG_SVM_SC8xx */
-
-
+
+
#if defined(CONFIG_NETVIA)
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC2 use.
#define PA_ENET_RCLK ((ushort)0x0200) /* PA 6 */
#define PA_ENET_TCLK ((ushort)0x0800) /* PA 4 */
-#define PB_ENET_PDN ((ushort)0x4000) /* PB 17 */
+#if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1
+# define PB_ENET_PDN ((ushort)0x4000) /* PB 17 */
+#elif CONFIG_NETVIA_VERSION >= 2
+# define PC_ENET_PDN ((ushort)0x0008) /* PC 12 */
+#endif
+
#define PB_ENET_TENA ((ushort)0x2000) /* PB 18 */
#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
#endif /* CONFIG_NETVIA */
+/*** QS850/QS823 ***************************************************/
+
+#if defined(CONFIG_QS850) || defined(CONFIG_QS823)
+#undef FEC_ENET /* Don't use FEC for EThernet */
+
+#define PROFF_ENET PROFF_SCC2
+#define CPM_CR_ENET CPM_CR_CH_SCC2
+#define SCC_ENET 1
+
+#define PA_ENET_RXD ((ushort)0x0004) /* RXD on PA13 (Pin D9) */
+#define PA_ENET_TXD ((ushort)0x0008) /* TXD on PA12 (Pin D7) */
+#define PC_ENET_RENA ((ushort)0x0080) /* RENA on PC8 (Pin D12) */
+#define PC_ENET_CLSN ((ushort)0x0040) /* CLSN on PC9 (Pin C12) */
+#define PA_ENET_TCLK ((ushort)0x0200) /* TCLK on PA6 (Pin D8) */
+#define PA_ENET_RCLK ((ushort)0x0800) /* RCLK on PA4 (Pin D10) */
+#define PB_ENET_TENA ((uint)0x00002000) /* TENA on PB18 (Pin D11) */
+#define PC_ENET_LBK ((ushort)0x0010) /* Loopback control on PC11 (Pin B14) */
+#define PC_ENET_LI ((ushort)0x0020) /* Link Integrity control PC10 (A15) */
+#define PC_ENET_SQE ((ushort)0x0100) /* SQE Disable control PC7 (B15) */
+
+/* SCC2 TXCLK from CLK2
+ * SCC2 RXCLK from CLK4
+ * SCC2 Connected to NMSI */
+#define SICR_ENET_MASK ((uint)0x00007F00)
+#define SICR_ENET_CLKRT ((uint)0x00003D00)
+
+#endif /* CONFIG_QS850/QS823 */
+
+/*** QS860T ***************************************************/
+
+#ifdef CONFIG_QS860T
+#ifdef CONFIG_FEC_ENET
+#define FEC_ENET /* use FEC for EThernet */
+#endif /* CONFIG_FEC_ETHERNET */
+
+/* This ENET stuff is for GTH 10 Mbit ( SCC ) */
+#define PROFF_ENET PROFF_SCC1
+#define CPM_CR_ENET CPM_CR_CH_SCC1
+#define SCC_ENET 0
+
+#define PA_ENET_RXD ((ushort)0x0001) /* PA15 */
+#define PA_ENET_TXD ((ushort)0x0002) /* PA14 */
+#define PA_ENET_TCLK ((ushort)0x0800) /* PA4 */
+#define PA_ENET_RCLK ((ushort)0x0200) /* PA6 */
+#define PB_ENET_TENA ((uint)0x00001000) /* PB19 */
+#define PC_ENET_CLSN ((ushort)0x0010) /* PC11 */
+#define PC_ENET_RENA ((ushort)0x0020) /* PC10 */
+
+#define SICR_ENET_MASK ((uint)0x000000ff)
+/* RCLK PA4 -->CLK4, TCLK PA6 -->CLK2 */
+#define SICR_ENET_CLKRT ((uint)0x0000003D)
+
+#endif /* CONFIG_QS860T */
+
/*** RPXCLASSIC *****************************************************/
#ifdef CONFIG_RPXCLASSIC
#define PA_ENET_TXD ((ushort)0x0008)
#define PA_ENET_TCLK ((ushort)0x0200)
#define PA_ENET_RCLK ((ushort)0x0800)
+#if defined(CONFIG_RMU)
+#define PC_ENET_TENA ((uint)0x00000002) /* PC14 */
+#else
#define PB_ENET_TENA ((uint)0x00002000)
+#endif
#define PC_ENET_CLSN ((ushort)0x0040)
#define PC_ENET_RENA ((ushort)0x0080)
#endif /* CONFIG_SXNI855T */
-/*** MVS1, TQM823L, TQM850L, ETX094, R360MPI ***********************/
+/*** MVS1, TQM823L/M, TQM850L/M, TQM885D, ETX094, R360MPI **********/
#if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \
- defined(CONFIG_R360MPI) || \
- defined(CONFIG_TQM823L) || \
- defined(CONFIG_TQM850L) || \
- defined(CONFIG_ETX094) || \
- defined(CONFIG_RRVISION)|| \
+ defined(CONFIG_R360MPI) || defined(CONFIG_RBC823) || \
+ defined(CONFIG_TQM823L) || defined(CONFIG_TQM823M) || \
+ defined(CONFIG_TQM850L) || defined(CONFIG_TQM850M) || \
+ defined(CONFIG_TQM885D) || defined(CONFIG_ETX094) || \
+ defined(CONFIG_RRVISION)|| defined(CONFIG_VIRTLAB2)|| \
(defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2)
+
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC2 use.
*/
#define PROFF_ENET PROFF_SCC2
#define CPM_CR_ENET CPM_CR_CH_SCC2
+#if (!defined(CONFIG_TK885D)) /* TK885D does not use SCC Ethernet */
#define SCC_ENET 1
+#endif
#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
*/
#define SICR_ENET_MASK ((uint)0x0000ff00)
#define SICR_ENET_CLKRT ((uint)0x00002600)
-#endif /* CONFIG_MVS v1, CONFIG_TQM823L, CONFIG_TQM850L, etc. */
-/*** TQM855L, TQM860L, TQM862L **************************************/
+# ifdef CONFIG_FEC_ENET /* Use FEC for Fast Ethernet */
+#define FEC_ENET
+# endif /* CONFIG_FEC_ENET */
-#if defined(CONFIG_TQM855L) || \
- defined(CONFIG_TQM860L) || \
- defined(CONFIG_TQM862L)
+#endif /* CONFIG_MVS v1, CONFIG_TQM823L/M, CONFIG_TQM850L/M, etc. */
+
+/*** TQM855L/M, TQM860L/M, TQM862L/M, TQM866L/M *********************/
+
+#if defined(CONFIG_TQM855L) || defined(CONFIG_TQM855M) || \
+ defined(CONFIG_TQM860L) || defined(CONFIG_TQM860M) || \
+ defined(CONFIG_TQM862L) || defined(CONFIG_TQM862M) || \
+ defined(CONFIG_TQM866L) || defined(CONFIG_TQM866M)
# ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */
#define PD_MII_MASK ((ushort)0x1FFF) /* PD 3...15 */
# endif /* CONFIG_FEC_ENET */
-#endif /* CONFIG_TQM855L, TQM860L, TQM862L */
+#endif /* CONFIG_TQM855L/M, TQM860L/M, TQM862L/M */
/*** V37 **********************************************************/
#define SICR_ENET_CLKRT ((uint)0x00002e00)
#endif /* CONFIG_V37 */
+
/*********************************************************************/
/* SCC Event register as used by Ethernet.
projects / karo-tx-uboot.git / blobdiff