Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[karo-tx-uboot.git] / include / configs / BSC9131RDB.h

diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index b5911c69450be70c082f88ccb2d1dff65bbd39f7..584aba8d0e44bcc8ce5ba4016564cf7d50a7ac56 100644 (file)
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -1,23 +1,7 @@
 /*
  * Copyright 2011-2012 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -45,7 +29,7 @@
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 
@@ -96,7 +80,7 @@
 #define CONFIG_SYS_MEMTEST_END         0x01ffffff
 
 /* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_SYS_DDR_RAW_TIMING
 #undef CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM         0
@@ -197,18 +181,18 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
 
 /* NAND Flash Timing Params */
-#define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x08)  \
-                                       | FTIM0_NAND_TWP(0x06)   \
-                                       | FTIM0_NAND_TWCHT(0x03) \
+#define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x03)  \
+                                       | FTIM0_NAND_TWP(0x05)   \
+                                       | FTIM0_NAND_TWCHT(0x02) \
                                        | FTIM0_NAND_TWH(0x04))
-#define CONFIG_SYS_NAND_FTIM1          (FTIM1_NAND_TADLE(0x18) \
-                                       | FTIM1_NAND_TWBE(0x23) \
-                                       | FTIM1_NAND_TRR(0x08)  \
+#define CONFIG_SYS_NAND_FTIM1          (FTIM1_NAND_TADLE(0x1C) \
+                                       | FTIM1_NAND_TWBE(0x1E) \
+                                       | FTIM1_NAND_TRR(0x07)  \
                                        | FTIM1_NAND_TRP(0x05))
 #define CONFIG_SYS_NAND_FTIM2          (FTIM2_NAND_TRAD(0x08)  \
                                        | FTIM2_NAND_TREH(0x04) \
-                                       | FTIM2_NAND_TWHRE(0x3f))
-#define CONFIG_SYS_NAND_FTIM3          FTIM3_NAND_TWW(0x22)
+                                       | FTIM2_NAND_TWHRE(0x11))
+#define CONFIG_SYS_NAND_FTIM3          FTIM3_NAND_TWW(0x04)
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
@@ -275,13 +259,11 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE     /* enable fit_format_{error,warning}() */
 
-#define CONFIG_FSL_I2C                 /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_SYS_I2C_SPEED           400000 /* I2C speed and slave address*/
-#define CONFIG_SYS_I2C_OFFSET          0x3000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
 
 /* I2C EEPROM */
 #define CONFIG_CMD_EEPROM
@@ -379,7 +361,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
 #define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size */
@@ -390,7 +371,6 @@ extern unsigned long get_sdram_size(void);
                                                /* Print Buffer Size */
 #define CONFIG_SYS_MAXARGS     16              /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ          1000    /* decrementer freq: 1ms ticks */
 
 /*
  * For booting Linux, the board info and command line data
@@ -402,7 +382,6 @@ extern unsigned long get_sdram_size(void);
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 #define CONFIG_USB_EHCI