Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / include / configs / BSC9132QDS.h

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 431c6869678194aafb5b2fb91678c197339823ad..1ab68915859bfac3b8f15c2a2dbedd15f1bf05ed 100644 (file)
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -1,23 +1,7 @@
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -49,6 +33,27 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0x1107fffc
 #endif
 
+#ifdef CONFIG_NAND
+#define CONFIG_SPL
+#define CONFIG_SPL_INIT_MINIMAL
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
+
+#define CONFIG_SYS_TEXT_BASE           0x00201000
+#define CONFIG_SPL_TEXT_BASE           0xFFFFE000
+#define CONFIG_SPL_MAX_SIZE            8192
+#define CONFIG_SPL_RELOC_TEXT_BASE     0x00100000
+#define CONFIG_SPL_RELOC_STACK         0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    ((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_DST     (0x00200000 - CONFIG_SPL_MAX_SIZE)
+#define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0
+#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE           0x8ff80000
 #endif
@@ -57,11 +62,12 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0x8ffffffc
 #endif
 
-#ifndef CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
+#else
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #endif
 
-
 /* High Level Configuration Options */
 #define CONFIG_BOOKE                   /* BOOKE */
 #define CONFIG_E500                    /* BOOKE e500 family */
@@ -73,6 +79,7 @@
 #if defined(CONFIG_PCI)
 #define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
@@ -221,6 +228,10 @@ combinations. this should be removed later
  * IFC Definitions
  */
 /* NOR Flash on IFC */
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_NO_FLASH
+#endif
 #define CONFIG_SYS_FLASH_BASE          0x88000000
 #define CONFIG_SYS_MAX_FLASH_SECT      1024    /* Max number of sector: 32M */
 
@@ -301,7 +312,9 @@ combinations. this should be removed later
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_FSL_QIXIS
+#endif
 #ifdef CONFIG_FSL_QIXIS
 #define CONFIG_SYS_FPGA_BASE   0xffb00000
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
@@ -337,6 +350,22 @@ combinations. this should be removed later
 #endif
 
 /* Set up IFC registers for boot location NOR/NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK0              CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR0               CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NAND_FTIM3
+#define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#else
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
 #define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
 #define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
@@ -351,6 +380,7 @@ combinations. this should be removed later
 #define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NAND_FTIM1
 #define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
+#endif
 
 #define CONFIG_BOARD_EARLY_INIT_F      /* Call board_pre_init */
 #define CONFIG_BOARD_EARLY_INIT_R
@@ -373,6 +403,9 @@ combinations. this should be removed later
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
 
 #define CONFIG_SERIAL_MULTI    1 /* Enable both serial ports */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV   /* determine from environment */
@@ -402,15 +435,14 @@ combinations. this should be removed later
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE     /* enable fit_format_{error,warning}() */
 
-#define CONFIG_FSL_I2C                 /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_SYS_I2C_SPEED           400800 /* I2C speed and slave address*/
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-#define CONFIG_SYS_I2C_OFFSET          0x3000
-#define CONFIG_SYS_I2C2_OFFSET         0x3100
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400800 /* I2C speed and slave address*/
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C2_SPEED      400800 /* I2C speed and slave address*/
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
 
 /* I2C EEPROM */
 #define CONFIG_ID_EEPROM
@@ -502,7 +534,6 @@ combinations. this should be removed later
 /*
  * Environment
  */
-#if defined(CONFIG_SYS_RAMBOOT)
 #if defined(CONFIG_RAMBOOT_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV         0
@@ -516,11 +547,15 @@ combinations. this should be removed later
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
 #define CONFIG_ENV_SIZE                0x2000
-#else
+#elif defined(CONFIG_NAND)
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE                CONFIG_SYS_NAND_BLOCK_SIZE
+#define CONFIG_ENV_OFFSET      ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_RANGE       (3 * CONFIG_ENV_SIZE)
+#elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE          /* Store ENV in memory only */
 #define CONFIG_ENV_ADDR                        (CONFIG_SYS_MONITOR_BASE - 0x1000)
 #define CONFIG_ENV_SIZE                        0x2000
-#endif
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000