Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / include / configs / CPCIISER4.h

diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index 5b50bcf331be34864150a0520d3f630deda43e54..25365f747cc16f0fde991410254f0b2ddf53f9e2 100644 (file)
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2001-2003
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -34,9 +18,10 @@
  */
 
 #define CONFIG_405GP           1       /* This is a PPC405 CPU         */
-#define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_CPCIISER4       1       /* ...on a CPCIISER4 board      */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFFC0000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 
 #define CONFIG_SYS_CLK_FREQ    25000000 /* external frequency to pll   */
@@ -54,7 +39,6 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
-#define CONFIG_NET_MULTI
 
 
 /*
@@ -95,7 +79,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory         */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt       */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size      */
 #else
@@ -110,6 +93,12 @@
 #define CONFIG_SYS_MEMTEST_START       0x0400000       /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
 
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK    1843200  /* use external serial clock   */
 
 /* The following table includes the supported baudrates */
@@ -120,8 +109,6 @@
 #define CONFIG_SYS_LOAD_ADDR   0x100000        /* default load address */
 #define CONFIG_SYS_EXTBDINFO   1               /* To use extended board_into (bd_t) */
 
-#define CONFIG_SYS_HZ          1000            /* decrementer freq: 1 ms ticks */
-
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
 
 /*-----------------------------------------------------------------------
@@ -133,6 +120,7 @@
 #define PCI_HOST_AUTO  2               /* detected via arbiter enable  */
 
 #define CONFIG_PCI                     /* include pci support          */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_PCI_HOST PCI_HOST_AUTO  /* select pci host function     */
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play         */
                                        /* resource configuration       */
@@ -188,10 +176,11 @@
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
@@ -241,17 +230,8 @@
  */
 #define CONFIG_SYS_INIT_DCACHE_CS      7       /* use cs # 7 for data cache memory    */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x40000000  /* use data cache                  */
-#define CONFIG_SYS_INIT_RAM_END        0x2000  /* End of used area in RAM             */
-#define CONFIG_SYS_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x2000  /* Size of used area in RAM            */
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 #endif /* __CONFIG_H */