Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / CRAYL1.h

diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 96bf161aa153b060f00e3223b74bfa4ab6a7db59..6bceccbc14b355b009fc276181753e506fcaf298 100644 (file)
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -36,6 +36,13 @@
 
 #define CONFIG_405GP           1       /* This is a PPC405 CPU */
 #define CONFIG_4xx                 1   /* ...member of PPC405 family */
+
+/*
+ * Note: I make an "image" from U-Boot itself, which prefixes 0x40
+ * bytes of header info, hence start address is thus shifted.
+ */
+#define        CONFIG_SYS_TEXT_BASE    0xFFFD0040
+
 #define CONFIG_SYS_CLK_FREQ 25000000
 #define CONFIG_BAUDRATE                9600
 #define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
@@ -45,7 +52,12 @@
 #define        CONFIG_PHY_ADDR         1       /* PHY address; handling of ENET */
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* early setup for 405gp */
 #define CONFIG_MISC_INIT_R     1       /* so that a misc_init_r() is called */
-#define CONFIG_NET_MULTI
+
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 
 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
  * keep possible initrd ramdisk decompression out.  This is in k (1024 bytes)
@@ -65,6 +77,7 @@
  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  */
 #define CONFIG_HARD_I2C         1              /* hardware support for i2c */
+#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
 #define CONFIG_SDRAM_BANK0             1
 #define CONFIG_SYS_I2C_SPEED               400000      /* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE               0x7F
@@ -74,7 +87,6 @@
 #define CONFIG_ENV_OVERWRITE     1
 #define        CONFIG_SYS_HZ                        1000       /* decrementer freq: 1 ms ticks */
 #define CONFIG_SYS_HUSH_PARSER                 1
-#define CONFIG_SYS_PROMPT_HUSH_PS2             "> "
 #define CONFIG_SOURCE                  1
 
 
@@ -141,7 +153,6 @@
 
 
 #define CONFIG_SYS_LOAD_ADDR           0x100000        /* where to load what we get from TFTP */
-#define CONFIG_SYS_TFTP_LOADADDR       CONFIG_SYS_LOAD_ADDR
 #define CONFIG_SYS_EXTBDINFO           1               /* To use extended board_into (bd_t) */
 #define CONFIG_SYS_DRAM_TEST           1
 
@@ -152,7 +163,7 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          0xFFC00000
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 
 
 #define CONFIG_SYS_MONITOR_LEN         (192 * 1024)    /* Reserve 192 kB for Monitor   */
@@ -214,17 +225,15 @@
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
-#define CONFIG_SYS_GBL_DATA_SIZE      256  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 #else
 #define CONFIG_SYS_OCM_DATA_ADDR       0xF0000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE        /* End of On Chip SRAM       */
-#define CONFIG_SYS_GBL_DATA_SIZE       64      /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM      */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 #endif
 
@@ -234,12 +243,4 @@
 #define EEPROM_WRITE_ADDRESS 0xA0
 #define EEPROM_READ_ADDRESS  0xA1
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 #endif /* __CONFIG_H */