Merge branch 'master' of git://git.denx.de/u-boot-mips

[karo-tx-uboot.git] / include / configs / HWW1U1A.h

diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h
index 01597b965b6ce16e2584b640eee76336050988d8..5aaa9767e97050cbe2dc4a08323c5701f6908f80 100644 (file)
--- a/include/configs/HWW1U1A.h
+++ b/include/configs/HWW1U1A.h
@@ -1,23 +1,7 @@
 /*
  * Copyright 2009-2010 eXMeritus, A Boeing Company
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -188,6 +172,7 @@
 #define CONFIG_PCI_PNP         /* Scan PCI busses                      */
 #define CONFIG_CMD_PCI         /* Enable the "pci" command             */
 #define CONFIG_FSL_PCI_INIT    /* Common FreeScale PCI initialization  */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  /* We have PCI-E reset errata           */
 #define CONFIG_SYS_PCI_64BIT   /* PCI resources are 64-bit             */
 #define CONFIG_PCI_SCAN_SHOW   /* Display PCI scan during boot         */
@@ -217,16 +202,16 @@
 /* -------------------------------------------------------------------- */
 
 /* Generic FreeScale hardware I2C support */
-#define CONFIG_HARD_I2C
-#define CONFIG_FSL_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
+#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x29} }
 #define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_OFFSET  0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
-
-/* I2C bus configuration */
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
 
 /* DDR2 SO-RDIMM SPD EEPROM is at I2C0-0x51 */
 #define CONFIG_SYS_SPD_BUS_NUM 0
@@ -407,7 +392,6 @@
 #define CONFIG_SYS_CBSIZE 4096         /* Allow up to 4k command lines */
 #define CONFIG_SYS_BARGSIZE 4096       /* Allow up to 4k boot args     */
 #define CONFIG_SYS_HUSH_PARSER         /* Enable a fancier shell       */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "        /* Command-line continuation    */
 
 /* A little extra magic here for the prompt */
 #define CONFIG_SYS_PROMPT hww1u1a_get_ps1()
@@ -422,7 +406,7 @@ const char *hww1u1a_get_ps1(void);
 #define CONFIG_MD5
 #define CONFIG_SHA1
 #define CONFIG_CMD_MD5SUM
-#define CONFIG_CMD_SHA1
+#define CONFIG_CMD_SHA1SUM
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_SETEXPR