* Based off of M5272C3 board code by Josef Baumgartner
* <josef.baumgartner@telex.de>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
#else
#define CONFIG_ENV_ADDR 0xffe04000
#define CONFIG_ENV_SECT_SIZE 0x2000
/* Available command configuration */
#include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
-#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1
#define CONFIG_MII_INIT 1
#define CONFIG_SYS_DISCOVER_PHY
#endif
/* I2C */
-#define CONFIG_FSL_I2C
-#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C
-#define CONFIG_SYS_I2C_SPEED 80000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_OFFSET 0x00000300
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED 80000
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
-#ifdef CONFIG_MCFFEC
-#define CONFIG_ETHADDR 00:06:3b:01:41:55
-#define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60
-#endif
-
#define CONFIG_SYS_PROMPT "-> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_RETRY_COUNT 5
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* FEC_ENET */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=10000\0" \
+ "uboot=u-boot.bin\0" \
+ "load=tftp ${loadaddr} ${uboot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ffe00000 ffe3ffff;" \
+ "era ffe00000 ffe3ffff;" \
+ "cp.b ${loadaddr} ffe00000 ${filesize};"\
+ "save\0" \
+ ""
+
#define CONFIG_SYS_CLK 150000000
/*
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial mmap for Linux */
+#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
+#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_CACHELINE_SIZE 16
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
+ CF_CACR_DISD | CF_CACR_INVI | \
+ CF_CACR_CEIB | CF_CACR_DCM | \
+ CF_CACR_EUSP)
+
/*-----------------------------------------------------------------------
* Memory bank definitions
*/
projects / karo-tx-uboot.git / blobdiff