Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / NETTA2.h

diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index a14b2dd8971612210c4f739966204a7ca91a1e5b..de0f950ae528fa5554cccae3d23ec17afae0d558 100644 (file)
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -41,6 +41,8 @@
 #define CONFIG_MPC870          1       /* This is a MPC885 CPU         */
 #define CONFIG_NETTA2          1       /* ...on a NetTA2 board         */
 
+#define        CONFIG_SYS_TEXT_BASE    0x40000000
+
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #undef CONFIG_8xx_CONS_SMC2
 #undef CONFIG_8xx_CONS_NONE
@@ -98,7 +100,6 @@
 
 #define        CONFIG_RTC_MPC8xx               /* use internal RTC of MPC8xx   */
 
-#define        CONFIG_NET_MULTI        1       /* the only way to get the FEC in */
 #define        FEC_ENET                1       /* eth.c needs it that way... */
 #undef CONFIG_SYS_DISCOVER_PHY
 #define CONFIG_MII             1
@@ -121,7 +122,6 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_NAND
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_MII
@@ -138,7 +138,6 @@
 #define        CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 
 #define CONFIG_SYS_HUSH_PARSER 1
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 
 #if defined(CONFIG_CMD_KGDB)
 #define        CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
@@ -156,8 +155,6 @@
 
 #define        CONFIG_SYS_HZ           1000            /* decrementer freq: 1 ms ticks */
 
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
-
 /*
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
@@ -172,9 +169,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
-#define        CONFIG_SYS_INIT_RAM_END 0x3000  /* End of used area in DPRAM    */
-#define        CONFIG_SYS_GBL_DATA_SIZE        64  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define        CONFIG_SYS_INIT_RAM_SIZE        0x3000  /* Size of used area in DPRAM   */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define        CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -480,14 +476,6 @@
                         MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |   \
                         MAMR_RLFA_1X    | MAMR_WLFA_1X    | MAMR_TLFA_4X)
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define        BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 #define CONFIG_LAST_STAGE_INIT         /* needed to reset the damn phys */
 
 /****************************************************************/
@@ -498,95 +486,9 @@
 #define DSP_BASE       0xF1000000
 #define NAND_BASE      0xF1010000
 
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE           NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-
-#define SECTORSIZE             512
-#define ADDR_COLUMN            1
-#define ADDR_PAGE              2
-#define ADDR_COLUMN_PAGE       3
-#define NAND_ChipID_UNKNOWN    0x00
-#define NAND_MAX_FLOORS                1
-
-/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
-#define NAND_DISABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |=  (1 << (31 - 20)); \
-       } while(0)
-
-#define NAND_ENABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \
-       } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \
-       } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |=  (1 << (31 - 17)); \
-       } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \
-       } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |=  (1 << (31 - 18)); \
-       } while(0)
-
-#if CONFIG_NETTA2_VERSION == 1
-#define NAND_WAIT_READY(nand) \
-       do { \
-               int _tries = 0; \
-               while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
-                       if (++_tries > 100000) \
-                               break; \
-       } while (0)
-#elif CONFIG_NETTA2_VERSION == 2
-#define NAND_WAIT_READY(nand) \
-       do { \
-               int _tries = 0; \
-               while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
-                       if (++_tries > 100000) \
-                               break; \
-       } while (0)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define READ_NAND(adr) \
-       ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
 /*****************************************************************************/
 
 #define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_SYS_DIRECT_NAND_TFTP
 
 /*****************************************************************************/