sunxi: non-FEL SPL boot support for sun7i

[karo-tx-uboot.git] / include / configs / aev.h

diff --git a/include/configs/aev.h b/include/configs/aev.h
index 98958a6237bbe42bf76afe6650d2083c44e01b66..2dffcfbed33204c7b75a55379afcf66b4da49280 100644 (file)
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -5,23 +5,7 @@
  * (C) Copyright 2004-2005
  * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -32,8 +16,7 @@
  * (easy to change)
  */
 
-#define CONFIG_MPC5xxx         1       /* This is an MPC5xxx CPU */
-#define CONFIG_MPC5200         1       /* (more precisely an MPC5200 CPU) */
+#define CONFIG_MPC5200         1       /* This is an MPC5200 CPU */
 #define CONFIG_TQM5200         1       /* ... on TQM5200 module */
 #undef CONFIG_TQM5200_REV100           /*  define for revision 100 modules */
 #define CONFIG_STK52XX         1       /* ... on a STK52XX base board */
@@ -41,10 +24,18 @@
 #define CONFIG_AEVFIFO         1
 #define CONFIG_SYS_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz */
 
-#define CONFIG_HIGH_BATS       1       /* High BATs supported */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000  boot low (standard configuration with room for
+ *             max 64 MByte Flash ROM)
+ * 0xFFF00000  boot high (for a backup copy of U-Boot)
+ * 0x00100000  boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFC000000
+#endif
 
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH  */
-#define BOOTFLAG_WARM          0x02    /* Software reboot           */
+#define CONFIG_HIGH_BATS       1       /* High BATs supported */
 
 /*
  * Serial console configuration
@@ -72,7 +63,6 @@
 #define CONFIG_PCI_IO_PHYS     CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE     0x01000000
 
-#define CONFIG_NET_MULTI       1
 #define CONFIG_EEPRO100                1
 #define CONFIG_SYS_RX_ETH_BUFFER       8  /* use 8 rx buffer on eepro100  */
 #define CONFIG_NS8382X         1
@@ -128,7 +118,7 @@
 
 #define        CONFIG_TIMESTAMP                /* display image timestamps */
 
-#if (TEXT_BASE == 0xFC000000)          /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000)               /* Boot low */
 #   define CONFIG_SYS_LOWBOOT          1
 #endif
 
@@ -221,7 +211,7 @@
 /*
  * Flash configuration
  */
-#define CONFIG_SYS_FLASH_BASE          TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
 
 /* use CFI flash driver if no module variant is spezified */
 #define CONFIG_SYS_FLASH_CFI           1       /* Flash is CFI conformant */
@@ -263,17 +253,16 @@
 #define CONFIG_SYS_INIT_RAM_ADDR       MPC5XXX_SRAM
 #ifdef CONFIG_POST
 /* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END        MPC5XXX_SRAM_POST_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE       MPC5XXX_SRAM_POST_SIZE
 #else
-#define CONFIG_SYS_INIT_RAM_END        MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE       MPC5XXX_SRAM_SIZE
 #endif
 
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #   define CONFIG_SYS_RAMBOOT          1
 #endif
@@ -286,10 +275,11 @@
  * Ethernet configuration
  */
 #define CONFIG_MPC5xxx_FEC     1
+#define CONFIG_MPC5xxx_FEC_MII100
 /*
- * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
+ * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
  */
-/* #define CONFIG_FEC_10MBIT 1 */
+/* #define CONFIG_MPC5xxx_FEC_MII10 */
 #define CONFIG_PHY_ADDR                0x00
 
 /*
@@ -329,7 +319,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory     */
-#define CONFIG_SYS_PROMPT              "=> "   /* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE              1024    /* Console I/O Buffer Size  */
 #else
@@ -347,8 +336,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x100000        /* default load address */
 
-#define CONFIG_SYS_HZ                  1000    /* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CACHELINE_SHIFT   5       /* log base 2 of the above value */