*
* Configuration settings for the AVR32 Network Gateway
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_ATNGW100 1
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATNGW100
-#define CFG_HZ 1000
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* and the PBA bus to run at 1/4 the PLL frequency.
*/
-#define CONFIG_PLL 1
-#define CFG_POWER_MANAGER 1
-#define CFG_OSC0_HZ 20000000
-#define CFG_PLL0_DIV 1
-#define CFG_PLL0_MUL 7
-#define CFG_PLL0_SUPPRESS_CYCLES 16
-#define CFG_CLKDIV_CPU 0
-#define CFG_CLKDIV_HSB 1
-#define CFG_CLKDIV_PBA 2
-#define CFG_CLKDIV_PBB 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
+#define CONFIG_SYS_OSC0_HZ 20000000
+#define CONFIG_SYS_PLL0_DIV 1
+#define CONFIG_SYS_PLL0_MUL 7
+#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
+#define CONFIG_SYS_CLKDIV_CPU 0
+#define CONFIG_SYS_CLKDIV_HSB 1
+#define CONFIG_SYS_CLKDIV_PBA 2
+#define CONFIG_SYS_CLKDIV_PBB 1
+
+/* Reserve VM regions for SDRAM and NOR flash */
+#define CONFIG_SYS_NR_VM_REGIONS 2
/*
* The PLLOPT register controls the PLL like this:
*
* We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
*/
-#define CFG_PLL0_OPT 0x04
-
-#define CONFIG_USART1 1
+#define CONFIG_SYS_PLL0_OPT 0x04
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
#define CONFIG_BOOTCOMMAND \
"fsload; bootm"
-/*
- * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
- * data on the serial line may interrupt the boot sequence.
- */
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
-#define CONFIG_AUTOBOOT_PROMPT \
- "Press SPACE to abort autoboot in %d seconds\n"
-#define CONFIG_AUTOBOOT_DELAY_STR "d"
-#define CONFIG_AUTOBOOT_STOP_STR " "
/*
* After booting the board for the first time, new ethernet addresses
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
/*
* BOOTP/DHCP options
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_DOS_PARTITION 1
-
/*
* Command line configuration.
*/
#define CONFIG_CMD_FAT
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
-#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PIO2 1
-#define CFG_NR_PIOS 5
-#define CFG_HSDRAMC 1
-#define CONFIG_MMC 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_NR_PIOS 5
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_GENERIC_MMC
+#define CONFIG_ATMEL_SPI
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
-#define CFG_DCACHE_LINESZ 32
-#define CFG_ICACHE_LINESZ 32
+#define CONFIG_SYS_DCACHE_LINESZ 32
+#define CONFIG_SYS_ICACHE_LINESZ 32
#define CONFIG_NR_DRAM_BANKS 1
-#define CFG_FLASH_CFI 1
-#define CFG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
-#define CFG_FLASH_BASE 0x00000000
-#define CFG_FLASH_SIZE 0x800000
-#define CFG_MAX_FLASH_BANKS 1
-#define CFG_MAX_FLASH_SECT 135
+#define CONFIG_SYS_FLASH_BASE 0x00000000
+#define CONFIG_SYS_FLASH_SIZE 0x800000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 135
-#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
-#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE
-#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE
-#define CFG_SDRAM_BASE EBI_SDRAM_BASE
+#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
+#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
+#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SIZE 65536
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SIZE 65536
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
-#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
-#define CFG_MALLOC_LEN (256*1024)
-#define CFG_DMA_ALLOC_LEN (16384)
+#define CONFIG_SYS_MALLOC_LEN (256*1024)
/* Allow 4MB for the kernel run-time image */
-#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
-#define CFG_BOOTPARAMS_LEN (16 * 1024)
+#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
+#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
/* Other configuration settings that shouldn't have to change all that often */
-#define CFG_PROMPT "U-Boot> "
-#define CFG_CBSIZE 256
-#define CFG_MAXARGS 16
-#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
-#define CFG_LONGHELP 1
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
-#define CFG_MEMTEST_START EBI_SDRAM_BASE
-#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000)
+#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
-#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
#endif /* __CONFIG_H */
projects / karo-tx-uboot.git / blobdiff