x86: Add Intel Bayley Bay board support

[karo-tx-uboot.git] / include / configs / cam_enc_4xx.h

diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index db9eb0f159fbd17dcb99676b4526fca24179d007..846a9c1e9fb2673ba0aa18ee1718c510dbe35008 100644 (file)
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -4,7 +4,7 @@
  * Copyright (C) 2011
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  *
- * SPDX-License-Identifier:    GPL-2.0+ 
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -14,11 +14,8 @@
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
 /* SoC Configuration */
-#define CONFIG_ARM926EJS                               /* arm926ejs CPU */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            24000000        /* timer0 freq */
-#define CONFIG_SYS_HZ                  1000
-#define CONFIG_SOC_DM365
 
 #define CONFIG_MACH_TYPE       MACH_TYPE_DAVINCI_DM365_EVM
 
@@ -58,10 +55,10 @@
 #define CONFIG_RESET_PHY_R
 
 /* I2C */
-#define CONFIG_HARD_I2C
-#define CONFIG_DRIVER_DAVINCI_I2C
-#define CONFIG_SYS_I2C_SPEED           400000
-#define CONFIG_SYS_I2C_SLAVE           0x10    /* SMBus host address */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED           400000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE           0x10    /* SMBus host address */
 
 /* NAND: socketed, two chipselects, normally 2 GBytes */
 #define CONFIG_NAND_DAVINCI
@@ -77,7 +74,6 @@
 
 /* SPI support */
 #define CONFIG_SPI
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
@@ -93,12 +89,6 @@
 #define CONFIG_MMC_MBLOCK
 
 /* U-Boot command configuration */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BDI
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_SETGETDCR
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_DHCP
@@ -200,7 +190,6 @@
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 
 /* Defines for SPL */
-#define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
@@ -237,6 +226,8 @@
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCSIZE                0x200
 #define CONFIG_SYS_NAND_ECCBYTES       10
+#define CONFIG_SYS_NAND_MAX_OOBFREE    2
+#define CONFIG_SYS_NAND_MAX_ECCPOS     56
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE