* Copyright (C) 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM365
#define CONFIG_MACH_TYPE MACH_TYPE_DAVINCI_DM365_EVM
#define CONFIG_HOSTNAME cam_enc_4xx
-#define BOARD_LATE_INIT
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_CAM_ENC_LED_MASK 0x0fc00000
/* Memory Info */
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 0x01c20000
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_SYS_EMAC_TI_CLKDIV 0xa9 /* 1MHz */
#define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
#define CONFIG_CMD_MII
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_RESET_PHY_R
/* I2C */
-#define CONFIG_HARD_I2C
-#define CONFIG_DRIVER_DAVINCI_I2C
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
+#define CONFIG_LZO
#endif
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
/* U-Boot general configuration */
-#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_PROMPT "cam_enc_4xx> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_LONGHELP
+#define CONFIG_MENU
+#define CONFIG_MENU_SHOW
+#define CONFIG_FIT
+#define CONFIG_BOARD_IMG_ADDR_R 0x80000000
+
#ifdef CONFIG_NAND_DAVINCI
-#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
+#define CONFIG_ENV_SIZE (16 << 10)
#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x0
+#define CONFIG_ENV_OFFSET 0x180000
+#define CONFIG_ENV_RANGE 0x040000
+#define CONFIG_ENV_OFFSET_REDUND 0x1c0000
#undef CONFIG_ENV_IS_IN_FLASH
#endif
#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_CMD_ENV
+#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
#define CONFIG_ENV_IS_IN_MMC
#endif
#define CONFIG_BOOTDELAY 3
+/*
+ * 24MHz InputClock / 15 prediv -> 1.6 MHz timer running
+ * Timeout 1 second.
+ */
+#define CONFIG_AIT_TIMER_TIMEOUT 0x186a00
#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
#define CONFIG_TIMESTAMP
/* U-Boot memory configuration */
-#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
#define CONFIG_SYS_MEMTEST_START 0x80000000 /* physical address */
#define CONFIG_SYS_MEMTEST_END 0x81000000 /* test 16MB RAM */
#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
-
-#ifdef CONFIG_SYS_NAND_LARGEPAGE
-/* Use same layout for 128K/256K blocks; allow some bad blocks */
-#define PART_BOOT "2m(bootloader)ro,"
-#endif
-
-#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
-#define PART_REST "-(filesystem)"
-
-#define MTDPARTS_DEFAULT \
- "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
-
-#define CONFIG_SYS_NAND_PAGE_SIZE (0x800)
-#define CONFIG_SYS_NAND_BLOCK_SIZE (0x20000)
+#define MTDPARTS_DEFAULT \
+ "mtdparts=" \
+ "davinci_nand.0:" \
+ "128k(spl)," \
+ "384k(UBLheader)," \
+ "1m(u-boot)," \
+ "512k(env)," \
+ "-(ubi)"
+
+#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
+#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
/* Defines for SPL */
#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_LOAD
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_POST_MEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds"
#define CONFIG_SPL_STACK (0x00010000 + 0x7f00)
-#define CONFIG_SPL_TEXT_BASE 0x0000020 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE 12320
+#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/
+/* Provide at least 16MB spacing between us and the Linux Kernel image */
+#define CONFIG_SPL_PAD_TO 12320
+#define CONFIG_SPL_MAX_FOOTPRINT 12288
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_TEXT_BASE 0x81080000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCSIZE 0x200
#define CONFIG_SYS_NAND_ECCBYTES 10
+#define CONFIG_SYS_NAND_MAX_OOBFREE 2
+#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
* so we can define, how many UBL Headers
* we can write before the real spl code
*/
-#define CONFIG_SYS_NROF_UBL_HEADER 5
#define CONFIG_SYS_NROF_PAGES_NAND_SPL 6
#define CONFIG_SYS_NAND_U_BOOT_DST 0x81080000 /* u-boot TEXT_BASE */
#define CONFIG_POST CONFIG_SYS_POST_MEMORY
#define _POST_WORD_ADDR 0x0
-#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xc0000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
-
-/*
- * U-Boot is a 3rd stage loader and if booting with spl, cpu setup is
- * done in board_init_f from c code.
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000
+#define CONFIG_SYS_NAND_U_BOOT_ERA_SIZE 0x100000
/* for UBL header */
#define CONFIG_SYS_UBL_BLOCK (CONFIG_SYS_NAND_PAGE_SIZE)
/*
* Default environment settings
*/
-#define xstr(s) str(s)
-#define str(s) #s
#define DVN4XX_UBOOT_ADDR_R_RAM 0x80000000
/* (DVN4XX_UBOOT_ADDR_R_RAM + CONFIG_SYS_NAND_PAGE_SIZE) */
#define DVN4XX_UBOOT_ADDR_R_UBOOT 0x80003800
#define CONFIG_EXTRA_ENV_SETTINGS \
- "u_boot_addr_r=" xstr(DVN4XX_UBOOT_ADDR_R_RAM) "\0" \
- "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.ubl\0" \
- "load=tftp ${u_boot_addr_r} ${uboot}\0" \
- "pagesz=" xstr(CONFIG_SYS_NAND_PAGE_SIZE) "\0" \
- "writeheader=nandrbl rbl;nand erase 80000 ${pagesz};" \
- "nand write ${u_boot_addr_r} 80000 ${pagesz};" \
+ "u_boot_addr_r=" __stringify(DVN4XX_UBOOT_ADDR_R_RAM) "\0" \
+ "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.ubl\0" \
+ "load=tftp ${u_boot_addr_r} ${u-boot}\0" \
+ "pagesz=" __stringify(CONFIG_SYS_NAND_PAGE_SIZE) "\0" \
+ "writeheader=nandrbl rbl;nand erase 20000 ${pagesz};" \
+ "nand write ${u_boot_addr_r} 20000 ${pagesz};" \
"nandrbl uboot\0" \
- "writenand_spl=nandrbl rbl;nand erase a0000 3000;" \
- "nand write " xstr(DVN4XX_UBOOT_ADDR_R_NAND_SPL) \
- " a0000 3000;nandrbl uboot\0" \
+ "writenand_spl=nandrbl rbl;nand erase 0 3000;" \
+ "nand write " __stringify(DVN4XX_UBOOT_ADDR_R_NAND_SPL) \
+ " 0 3000;nandrbl uboot\0" \
"writeuboot=nandrbl uboot;" \
- "nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) \
- ";nand write " xstr(DVN4XX_UBOOT_ADDR_R_UBOOT) \
- " " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
+ "nand erase " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " "\
+ __stringify(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
+ ";nand write " __stringify(DVN4XX_UBOOT_ADDR_R_UBOOT) \
+ " " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
"update=run load writenand_spl writeuboot\0" \
- "bootcmd=run bootcmd\0" \
+ "bootcmd=run net_nfs\0" \
"rootpath=/opt/eldk-arm/arm\0" \
+ "mtdids=" MTDIDS_DEFAULT "\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "netdev=eth0\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addmisc=setenv bootargs ${bootargs} app_reset=${app_reset}\0" \
+ "addcon=setenv bootargs ${bootargs} console=ttyS0," \
+ "${baudrate}n8\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off eth=${ethaddr} panic=1\0" \
+ "rootpath=/opt/eldk-arm/arm\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage \0" \
+ "kernel_addr_r=80600000\0" \
+ "load_kernel=tftp ${kernel_addr_r} ${bootfile}\0" \
+ "ubi_load_kernel=ubi part ubi 2048;ubifsmount ubi:${img_volume};" \
+ "ubifsload ${kernel_addr_r} boot/uImage\0" \
+ "fit_addr_r=" __stringify(CONFIG_BOARD_IMG_ADDR_R) "\0" \
+ "img_addr_r=" __stringify(CONFIG_BOARD_IMG_ADDR_R) "\0" \
+ "img_file=" __stringify(CONFIG_HOSTNAME) "/ait.itb\0" \
+ "header_addr=20000\0" \
+ "img_writeheader=nandrbl rbl;" \
+ "nand erase ${header_addr} ${pagesz};" \
+ "nand write ${img_addr_r} ${header_addr} ${pagesz};" \
+ "nandrbl uboot\0" \
+ "img_writespl=nandrbl rbl;nand erase 0 3000;" \
+ "nand write ${img_addr_r} 0 3000;nandrbl uboot\0" \
+ "img_writeuboot=nandrbl uboot;" \
+ "nand erase " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " "\
+ __stringify(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
+ ";nand write ${img_addr_r} " \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
+ "img_writedfenv=ubi part ubi 2048;" \
+ "ubi write ${img_addr_r} default ${filesize}\0" \
+ "img_volume=rootfs1\0" \
+ "img_writeramdisk=ubi part ubi 2048;" \
+ "ubi write ${img_addr_r} ${img_volume} ${filesize}\0" \
+ "load_img=tftp ${fit_addr_r} ${img_file}\0" \
+ "net_nfs=run load_kernel; " \
+ "run nfsargs addip addcon addmtd addmisc;" \
+ "bootm ${kernel_addr_r}\0" \
+ "ubi_ubi=run ubi_load_kernel; " \
+ "run ubiargs addip addcon addmtd addmisc;" \
+ "bootm ${kernel_addr_r}\0" \
+ "ubiargs=setenv bootargs ubi.mtd=4,2048" \
+ " root=ubi0:${img_volume} rw rootfstype=ubifs\0" \
+ "app_reset=no\0" \
+ "dvn_app_vers=void\0" \
+ "dvn_boot_vers=void\0" \
+ "savenewvers=run savetmpparms restoreparms; saveenv;" \
+ "run restoretmpparms\0" \
+ "savetmpparms=setenv y_ipaddr ${ipaddr};" \
+ "setenv y_netmask ${netmask};" \
+ "setenv y_serverip ${serverip};" \
+ "setenv y_gatewayip ${gatewayip}\0" \
+ "saveparms=setenv x_ipaddr ${ipaddr};" \
+ "setenv x_netmask ${netmask};" \
+ "setenv x_serverip ${serverip};" \
+ "setenv x_gatewayip ${gatewayip}\0" \
+ "restoreparms=setenv ipaddr ${x_ipaddr};" \
+ "setenv netmask ${x_netmask};" \
+ "setenv serverip ${x_serverip};" \
+ "setenv gatewayip ${x_gatewayip}\0" \
+ "restoretmpparms=setenv ipaddr ${y_ipaddr};" \
+ "setenv netmask ${y_netmask};" \
+ "setenv serverip ${y_serverip};" \
+ "setenv gatewayip ${y_gatewayip}\0" \
"\0"
/* USB Configuration */
projects / karo-tx-uboot.git / blobdiff